STM32F405ZG STMicroelectronics, STM32F405ZG Datasheet - Page 131
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STM32F405ZG
Manufacturer Part Number
STM32F405ZG
Description
High-performance and DSP with FPU, ARM Cortex-M4 MCU with 1 Mbyte Flash, 168 MHz CPU, Art Accelerator
Manufacturer
STMicroelectronics
Datasheet
1.STM32F405VG.pdf
(167 pages)
Specifications of STM32F405ZG
Core
ARM 32-bit Cortex™-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
3×12-bit, 2.4 Msps A/d Converters
up to 24 channels and 7.2 MSPS in triple interleaved mode
General-purpose Dma
16-stream DMA controller with FIFOs and burst support
Up To 17 Timers
up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII
Rtc
subsecond accuracy, hardware calendar
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F405ZGT6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
STM32F405ZGT6
Manufacturer:
ST
Quantity:
20 000
STM32F405xx, STM32F407xx
Synchronous waveforms and timings
Figure 56
Table 78
with the following FSMC configuration:
●
●
●
●
●
In all timing tables, the
FSMC_CLK = 60 MHz).
Figure 56. Synchronous multiplexed NOR/PSRAM read timings
BurstAccessMode = FSMC_BurstAccessMode_Enable;
MemoryType = FSMC_MemoryType_CRAM;
WriteBurst = FSMC_WriteBurst_Enable;
CLKDivision = 1; (0 is not supported, see the STM32F40xxx/41xxx reference manual)
DataLatency = 1 for NOR Flash; DataLatency = 0 for PSRAM
provide the corresponding timings. The results shown in these tables are obtained
through
Figure 59
T
HCLK
represent synchronous waveforms and
is the HCLK clock period (with maximum
Doc ID 022152 Rev 2
Electrical characteristics
Table 76
through
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