ST72325S4 STMicroelectronics, ST72325S4 Datasheet - Page 12

• Manufacturer Part Number: ST72325S4
• Description: 8-BIT MCU WITH 16 TO 60K FLASH/ROM, ADC, CSS, FIVE TIMERS, SPI, SCI, I2C INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72325S4

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• Four Power Saving Modes: Halt, Active-Halt,Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
• 8-bit Pwm Auto-reload Timer With: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector

ST72325xx
PIN DESCRIPTION (Cont’d)
For external pin connection guidelines, refer to See “ELECTRICAL CHARACTERISTICS” on page 142.
Legend / Abbreviations for
Type:
Input level:
In/Output level: C = CMOS 0.3V
Output level:
Port and control configuration:
Refer to
The RESET configuration of each pin is shown in bold. This configuration is valid as long as the device is
in reset state.
Table 2. LQFP64/48/44 and SDIP42 Device Pin Descriptions
12/197
10
11
12
13
14 19 10
15 11 11
16 12 12 10
– Input:
– Output:
1
2
3
4
5
6
7
8
9
= Pin not connected in ST72325S devices
-
-
-
-
-
2
3
4
5
6
7
8
9
4)
4)
4)
4)
4)
Pin n°
“I/O PORTS” on page 50
3
4
5
6
7
9
-
-
-
-
-
-
-
2
3
4
5
6
7
8
9
-
-
-
-
-
-
-
I = input, O = output, S = supply
A = Dedicated analog input
C
HS = 20mA high sink (on N-buffer only)
float = floating, wpu = weak pull-up, int = interrupt
OD = open drain
39 PB0/PWM3
40 PB1/PWM2
41 PB2/PWM1
42 PB3/PWM0
T
1
2
3
4
5
-
-
-
-
-
-
-
= CMOS 0.3V
PE4 (HS)
PE5 (HS)
PE6 (HS)
PE7 (HS)
PB4 (HS)/ARTCLK
PB5 / ARTIC1
PB6 / ARTIC2
PB7
PD0/AIN0
PD1/AIN1
PD2/AIN2
PD3/AIN3
Pin Name
Table 2
DD
DD
2)
for more details on the software configuration of the I/O ports.
, PP = push-pull
/0.7V
/0.7V
and
DD
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
DD
Table
with input trigger
Level
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
3:
HS
HS
HS
HS
HS
X X
X X
X X
X X
X
X
X
X
X
X
X
X
X X
X X
X X
X X
Input
ei2
ei2
ei2
ei3
ei3
ei3
ei2
ei3
Port
X
X
X
X
1)
Output
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
, ana = analog
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
function
Port E4
Port E5
Port E6
Port E7
Port B0
Port B1
Port B2
Port B3
Port B4
Port B5
Port B6
Port B7
Port D0
Port D1
Port D2
Port D3
reset)
(after
Main
PWM Output 2
PWM Output 1
PWM Output 0
PWM Output 3
Caution: Negative cur-
rent injection not al-
lowed on this pin
PWM-ART External
Clock
PWM-ART Input Cap-
ture 1
PWM-ART Input Cap-
ture 2
ADC Analog Input 0
ADC Analog Input 1
ADC Analog Input 2
ADC Analog Input 3
Alternate function