ST7LITE25F2 STMicroelectronics, ST7LITE25F2 Datasheet - Page 105

• Manufacturer Part Number: ST7LITE25F2
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
• Manufacturer: STMicroelectronics

Specifications of ST7LITE25F2

• 8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55˚C.
• Clock Sources: Internal 1% RC oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt

EMC CHARACTERISTICS (Cont’d)
13.7.3 Absolute Maximum Ratings (Electrical
Sensitivity)
Based on three different tests (ESD, LU and DLU)
using specific measurement methods, the product
is stressed in order to determine its performance in
terms of electrical sensitivity. For more details, re-
fer to the application note AN1181.
Absolute Maximum Ratings
Note:
1. Data based on characterization results, not tested in production.
13.7.3.2 Static and Dynamic Latch-Up
■
Electrical Sensitivities
Note:
1. Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the JEDEC spec-
ifications, that means when a device belongs to Class A it exceeds the JEDEC standard. B Class strictly covers all the
JEDEC criteria (international standard).
V
LU: 3 complementary static tests are required
on 10 parts to assess the latch-up performance.
A supply overvoltage (applied to each power
supply pin) and a current injection (applied to
each input, output and configurable I/O pin) are
performed on each sample. This test conforms
to the EIA/JESD 78 IC latch-up standard. For
more details, refer to the application note
AN1181.
Symbol
Symbol
ESD(HBM)
DLU
LU
Electro-static discharge voltage
(Human Body Model)
Static latch-up class
Dynamic latch-up class
Parameter
Ratings
V
T
T
A
A
DD
=+25°C
=+25°C
=5.5V, f
13.7.3.1 Electro-Static Discharge (ESD)
Electro-Static Discharges (a positive then a nega-
tive pulse separated by 1 second) are applied to
the pins of each sample according to each pin
combination. The sample size depends on the
number of supply pins in the device (3 parts*(n+1)
supply pin). This test conforms to the JESD22-
A114A/A115A standard.
■
DLU: Electro-Static Discharges (one positive
then one negative test) are applied to each pin
of 3 samples when the micro is running to
assess the latch-up performance in dynamic
mode. Power supplies are set to the typical
values, the oscillator is connected as near as
possible to the pins of the micro and the
component is put in reset mode. This test
conforms to the IEC1000-4-2 and SAEJ1752/3
standards. For more details, refer to the
application note AN1181.
Conditions
Conditions
OSC
=4MHz, T
A
=+25°C
Maximum value
4000
Class
A
A
ST7LITE2
1)
1)
105/133
Unit
V