ST7LITE25F2 STMicroelectronics, ST7LITE25F2 Datasheet - Page 71
ST7LITE25F2
Manufacturer Part Number
ST7LITE25F2
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet
1.ST7LITE20F2.pdf
(133 pages)
Specifications of ST7LITE25F2
8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
Clock Sources
Internal 1% RC oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt
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SERIAL PERIPHERAL INTERFACE (Cont’d)
11.4.3.1 Functional Description
A basic example of interconnections between a
single master and a single slave is illustrated in
Figure
The MOSI pins are connected together and the
MISO pins are connected together. In this way
data is transferred serially between master and
slave (most significant bit first).
The communication is always initiated by the mas-
ter. When the master device transmits data to a
slave device via MOSI pin, the slave device re-
Figure 43. Single Master/ Single Slave Application
43.
MSBit
8-BIT SHIFT REGISTER
GENERATOR
CLOCK
SPI
MASTER
LSBit
MOSI
SCK
SS
MISO
+5V
sponds by sending data to the master device via
the MISO pin. This implies full duplex communica-
tion with both data out and data in synchronized
with the same clock signal (which is provided by
the master device via the SCK pin).
To use a single data line, the MISO and MOSI pins
must be connected at each node ( in this case only
simplex communication is possible).
Four possible data/clock timing relationships may
be chosen (see
must be programmed with the same timing mode.
MOSI
MISO
SCK
SS
Figure
8-BIT SHIFT REGISTER
MSBit
Not used if SS is managed
by software
46) but master and slave
SLAVE
ST7LITE2
LSBit
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