ST72561J6-Auto STMicroelectronics, ST72561J6-Auto Datasheet - Page 213

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ST72561J6-Auto

Manufacturer Part Number
ST72561J6-Auto
Description
8-bit MCU for automotive
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72561J6-Auto

Hdflash Endurance
100 cycles, data retention 20 years at 55 °C
5 Power Saving Modes
halt, auto wake up from halt, active halt, wait and slow
ST72561-Auto
16.8.6
Note:
Baud rate register (SCIBRR)
Read/ write
Reset value: 0000 0000 (00h)
Bits 7:6 = SCP[1:0] First SCI Prescaler
These 2 prescaling bits allow several standard clock division ranges:
Table 77.
Bits 5:3 = SCT[2:0] SCI Transmitter rate divisor
These 3 bits, in conjunction with the SCP1 and SCP0 bits define the total division applied to
the bus clock to yield the transmit rate clock in conventional baud rate generator mode.
Table 78.
This TR factor is used only when the ETPR fine tuning factor is equal to 00h; otherwise, TR
is replaced by the (TR*ETPR) dividing factor.
Bits 2:0 = SCR[2:0] SCI Receiver rate divisor.
These 3 bits, in conjunction with the SCP1 and SCP0 bits define the total division applied to
the bus clock to yield the receive rate clock in conventional baud rate generator mode.
SCP1
7
TR dividing factor
PR prescaler
Transmitter rate divider
SCP0
PR prescaling factor
128
16
32
64
1
2
4
8
13
1
3
4
SCT2
Doc ID 12370 Rev 8
LINSCI serial communication interface (LIN master only)
SCT1
SCT2
0
1
SCT0
SCP1
0
1
SCR2
SCT1
0
1
0
1
SCR1
SCP0
SCT0
0
1
0
1
0
1
0
1
0
1
0
1
SCR0
213/324
0

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