ST72561J6-Auto STMicroelectronics, ST72561J6-Auto Datasheet - Page 296

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ST72561J6-Auto

Manufacturer Part Number
ST72561J6-Auto
Description
8-bit MCU for automotive
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72561J6-Auto

Hdflash Endurance
100 cycles, data retention 20 years at 55 °C
5 Power Saving Modes
halt, auto wake up from halt, active halt, wait and slow
Electrical characteristics
296/324
Figure 139. SPI slave timing diagram with CPHA = 0
1. Measurement points are done at CMOS levels: 0.3 x V
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
Figure 140. SPI slave timing diagram with CPHA = 1
1. Measurement points are done at CMOS levels: 0.3 x V
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
mode) has its alternate function capability released. In this case, the pin status depends on the I/O port
configuration.
mode) has its alternate function capability released. In this case, the pin status depends on the I/O port
configuration.
MISO
MOSI
MISO
MOSI
SS
SS
CPHA = 1
CPOL = 0
CPHA = 1
CPOL = 1
CPHA = 0
CPOL = 0
CPHA = 0
CPOL = 1
OUTPUT
INPUT
OUTPUT
INPUT
INPUT
INPUT
See
note 2
See note 2
t
a(SO)
t
su(SS)
t
a(SO)
Hz
t
su(SS)
t
su(SI)
t
t
w(SCKH)
w(SCKL)
t
su(SI)
Doc ID 12370 Rev 8
t
t
MSB IN
w(SCKH)
w(SCKL)
MSB OUT
MSB IN
MSB OUT
t
t
h(SI)
c(SCK)
t
h(SI)
t
c(SCK)
t
v(SO)
t
v(SO)
BIT6 OUT
DD
DD
BIT6 OUT
and 0.7 x V
and 0.7 x V
BIT1 IN
t
BIT1 IN
h(SO)
DD
DD
t
h(SO)
.
t
t
r(SCK)
f(SCK)
t
t
r(SCK)
f(SCK)
LSB IN
LSB IN
LSB OUT
LSB OUT
t
t
h(SS)
h(SS)
ST72561-Auto
t
t
dis(SO)
dis(SO)
See
note 2
See
note 2

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