ST72260G1 STMicroelectronics, ST72260G1 Datasheet - Page 120

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ST72260G1

Manufacturer Part Number
ST72260G1
Description
8-BIT MCU WITH FLASH OR ROM MEMORY, ADC, TWO 16-BIT TIMERS, I2C, SPI, SCI INTERFACES
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72260G1

4 K Or 8 Kbytes Program Memory
ROM or single voltage extended Flash (XFlash) with read-out protection, write protection, In-Circuit Programming and In-Application Programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt,Wait and Slow
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and Pulse generator modes
ST72260Gx, ST72262Gx, ST72264Gx
12 INSTRUCTION SET
12.1 CPU ADDRESSING MODES
The CPU features 17 different addressing modes
which can be classified in 7 main groups:
The CPU Instruction set is designed to minimize
the number of bytes required per instruction: To do
Table 24. CPU Addressing Mode Overview
120/172
Addressing Mode
Inherent
Immediate
Direct
Indexed
Indirect
Relative
Bit operation
Inherent
Immediate
Short
Long
No Offset
Short
Long
Short
Long
Short
Long
Relative
Relative
Bit
Bit
Bit
Bit
Mode
Direct
Direct
Direct
Direct
Direct
Indirect
Indirect
Indirect
Indirect
Direct
Indirect
Direct
Indirect
Direct
Indirect
Indexed
Indexed
Indexed
Indexed
Indexed
Relative
Relative
Example
nop
ld A,#$55
ld A,$55
ld A,($55,X)
ld A,([$55],X)
jrne loop
bset
byte,#5
nop
ld A,#$55
ld A,$10
ld A,$1000
ld A,(X)
ld A,($10,X)
ld A,($1000,X)
ld A,[$10]
ld A,[$10.w]
ld A,([$10],X)
ld A,([$10.w],X)
jrne loop
jrne [$10]
bset $10,#7
bset [$10],#7
btjt $10,#7,skip
btjt [$10],#7,skip
Syntax
Destination
00..FF
0000..FFFF
00..FF
00..1FE
0000..FFFF
00..FF
0000..FFFF
00..1FE
0000..FFFF
PC+/-127
PC+/-127
00..FF
00..FF
00..FF
00..FF
so, most of the addressing modes may be subdi-
vided in two sub-modes called long and short:
– Long addressing mode is more powerful be-
– Short addressing mode is less powerful because
The ST7 Assembler optimizes the use of long and
short addressing modes.
cause it can use the full 64 Kbyte address space,
however it uses more bytes and more CPU cy-
cles.
it can generally only access page zero (0000h -
00FFh range), but the instruction size is more
compact, and faster. All memory to memory in-
structions use short addressing modes only
(CLR, CPL, NEG, BSET, BRES, BTJT, BTJF,
INC, DEC, RLC, RRC, SLL, SRL, SRA, SWAP)
00..FF
00..FF
00..FF
00..FF
00..FF
00..FF
00..FF
Address
Pointer
(Hex.)
Pointer Size
byte
word
byte
word
byte
byte
byte
(Hex.)
+ 0
+ 1
+ 1
+ 0
+ 2
+ 2
+ 2
+ 2
+ 1
+ 2
+ 1
+ 2
+ 2
+ 3
+ 2
+ 1
+ 2
Length
(Bytes)

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