ST72260G1 STMicroelectronics, ST72260G1 Datasheet - Page 26

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ST72260G1

Manufacturer Part Number
ST72260G1
Description
8-BIT MCU WITH FLASH OR ROM MEMORY, ADC, TWO 16-BIT TIMERS, I2C, SPI, SCI INTERFACES
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72260G1

4 K Or 8 Kbytes Program Memory
ROM or single voltage extended Flash (XFlash) with read-out protection, write protection, In-Circuit Programming and In-Application Programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt,Wait and Slow
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and Pulse generator modes
ST72260Gx, ST72262Gx, ST72264Gx
SYSTEM INTEGRITY MANAGEMENT (Cont’d)
6.4.3 Low Power Modes
6.4.3.1 Interrupts
The AVD interrupt event generates an interrupt if
the corresponding Enable Control Bit (AVDIE) is
26/172
WAIT
HALT
Mode
No effect on SI. AVD interrupts cause the
device to exit from Wait mode.
The SICSR register is frozen.
Description
set and the interrupt mask in the CC register is re-
set (RIM instruction).
AVD event
Interrupt Event
Event
AVDF
Flag
Control
Enable
AVDIE
Bit
from
Wait
Exit
Yes
from
Halt
Exit
No

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