ST72260G1 STMicroelectronics, ST72260G1 Datasheet - Page 34

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ST72260G1

Manufacturer Part Number
ST72260G1
Description
8-BIT MCU WITH FLASH OR ROM MEMORY, ADC, TWO 16-BIT TIMERS, I2C, SPI, SCI INTERFACES
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72260G1

4 K Or 8 Kbytes Program Memory
ROM or single voltage extended Flash (XFlash) with read-out protection, write protection, In-Circuit Programming and In-Application Programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt,Wait and Slow
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and Pulse generator modes
ST72260Gx, ST72262Gx, ST72264Gx
POWER SAVING MODES (Cont’d)
8.3 WAIT MODE
WAIT mode places the MCU in a low power con-
sumption mode by stopping the CPU.
This power saving mode is selected by calling the
“WFI” ST7 software instruction.
All peripherals remain active. During WAIT mode,
the I [1:0] bits in the CC register are forced to ‘10b’ ,
to enable all interrupts. All other registers and
memory remain unchanged. The MCU remains in
WAIT mode until an interrupt or Reset occurs,
whereupon the Program Counter branches to the
starting address of the interrupt or Reset service
routine.
The MCU will remain in WAIT mode until a Reset
or an Interrupt occurs, causing it to wake up.
Refer to
34/172
Figure
22.
Figure 22. WAIT Mode Flowchart
Note:
1. Before servicing an interrupt, the CC register is
pushed on the stack. The I[1:0] bits in the CC reg-
ister are set during the interrupt routine and
cleared when the CC register is popped.
WFI INSTRUCTION
N
INTERRUPT
Y
OR SERVICE INTERRUPT
FETCH RESET VECTOR
4096 CPU CLOCK CYCLE
OSCILLATOR
PERIPHERALS
CPU
I[1:0] BITS
OSCILLATOR
PERIPHERALS
CPU
I[1:0] BITS
OSCILLATOR
PERIPHERALS
CPU
I[1:0] BITS
N
DELAY
RESET
Y
XX
OFF
OFF
ON
ON
ON
ON
ON
ON
ON
0
1
1)

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