ST7263BK6 STMicroelectronics, ST7263BK6 Datasheet - Page 103
ST7263BK6
Manufacturer Part Number
ST7263BK6
Description
LOW SPEED USB 8-BIT MCU FAMILY WITH UP TO 32K FLASH/ROM, DFU CAPABILITY, 8-BIT ADC, WDG, TIMER, SCI and I2C
Manufacturer
STMicroelectronics
Datasheet
1.ST7263BH6.pdf
(186 pages)
Specifications of ST7263BK6
4, 8, 16 Or 32 Kbytes Program Memory
high density Flash (HDFlash), FastROM or ROM with Read-Out and Write protection
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ST7263Bxx
Control register (CTLR)
Reset value: 0000 0110 (06h)
Device Address register (DADDR)
Reset value: 0000 0000 (00h)
7
0
7
0
[6:0] ADD[6:0] Device address, 7 bits.
[7:4] Reserved. Forced by hardware to 0.
0
ADD6
7 Reserved. Forced by hardware to 0.
3 RESUME Resume.
2 PDWN Power down.
1 FSUSP Force suspend mode.
0 FRES Force reset.
Software must write into this register the address sent by the host during
enumeration.
Note: This register is also reset when a USB reset is received from the USB bus or
This bit is set by software to wakeup the Host when the ST7 is in suspend mode.
0: Resume signal not forced
1: Resume signal forced on the USB bus.
Software should clear this bit after the appropriate delay.
This bit is set by software to turn off the 3.3 V on-chip voltage regulator that
supplies the external pull-up resistor and the transceiver.
0: Voltage regulator on
1: Voltage regulator off
Note: After turning on the voltage regulator, software should allow at least 3 µs for
This bit is set by software to enter Suspend mode. The ST7 should also be halted
allowing at least 600 ns before issuing the HALT instruction.
0: Suspend mode inactive
1: Suspend mode active
When the hardware detects USB activity, it resets this bit (it can also be reset by
software).
This bit is set by software to force a reset of the USB interface, just as if a RESET
sequence came from the USB.
0: Reset not forced
1: USB interface reset forced.
The USB is held in RESET state until software clears this bit, at which point a “USB-
RESET” interrupt will be generated if enabled.
0
forced through bit FRES in the CTLR register.
stabilization of the power supply before using the USB interface.
ADD5
0
Doc ID 7516 Rev 8
ADD4
RESUME
Read/write
Read.write
ADD3
PDWN
ADD2
FSUSP
On-chip peripherals
ADD1
FRES
ADD0
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