71M6543F Maxim, 71M6543F Datasheet - Page 74
71M6543F
Manufacturer Part Number
71M6543F
Description
The 71M6543F/71M6543H are Teridian's 4th-generation polyphase metering system-on-chips (SoCs) with a 5MHz, 8051-compatible MPU core, low-power real-time clock (RTC) with digital temperature compensation, flash memory, and LCD driver
Manufacturer
Maxim
Datasheet
1.71M6543F.pdf
(157 pages)
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71M6543F/H and 71M6543G/GH Data Sheet
74
Note:
All
TMUX2[4:0]
TMUX2[4:0]
12
13
14
15
16
17
18
1F
C
A
B
E
0
1
2
3
8
9
values which are not shown are reserved.
Signal Name
WD_OVF
PULSE_1S
PULSE_4S
RTCLK
SPARE[1] bit – I/O RAM
0x2704[1]
SPARE[2] bit – I/O RAM
0x2704[2]
WAKE
MUX_SYNC
MCK
GNDD
INT0 – DIG I/O
INT1 – DIG I/O
INT2 – CE_PULSE
INT3 – CE_BUSY
INT4 - VSTAT
INT5 – EEPROM/SPI
INT6 – XFER, RTC
RTM_CK (flash)
© 2008–2011 Teridian Semiconductor Corporation
Table 61: TMUX2[4:0] Selections
Description
Indicates when the watchdog timer has expired (overflowed).
One second pulse with 25% Duty Cycle. This signal can be used
to measure the deviation of the RTC from an ideal 1 second
interval. Multiple cycles should be averaged together to filter out
jitter.
Four second pulse with 25% Duty Cycle. This signal can be used
to measure the deviation of the RTC from an ideal 4 second
interval. Multiple cycles should be averaged together to filter out
jitter. The 4 second pulse provides a more precise measurement
than the 1 second pulse.
32.768 kHz clock waveform
Copies the value of the bit stored in 0x2704[1]. For general
purpose use.
Copies the value of the bit stored in 0x2704[2]. For general
purpose use.
Indicates when a WAKE event has occurred.
Internal multiplexer frame SYNC signal. See
5
See
Digital GND. Use this signal to make the TMUX2OUT pin static.
Interrupt 0. See
See
.
2.5.3
2.3.5
on page 50.
on page 26.
2.4.9
on page 40. Also see
Figure 12
Figure 4
and
on page 46.
Figure
v1.2
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