TDA9898HN/V3,551 NXP Semiconductors, TDA9898HN/V3,551 Datasheet - Page 38

IC IF PROCESSOR HYBRID 48-HVQFN

TDA9898HN/V3,551

Manufacturer Part Number
TDA9898HN/V3,551
Description
IC IF PROCESSOR HYBRID 48-HVQFN
Manufacturer
NXP Semiconductors
Type
Demodulatorr
Datasheets

Specifications of TDA9898HN/V3,551

Applications
TV
Mounting Type
Surface Mount
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935288218551
NXP Semiconductors
Table 47.
Table 48.
[1]
Table 49.
Table 50.
TDA9897_TDA9898_4
Product data sheet
Bit
5
4 to 0
Bit
TOPPOS4
W10[4]
1
:
1
:
0
Bit
7 and 6
5
4
3
2
1
See
7
0
Table 53
W10 - data write register bit description
Tuner takeover point adjustment bits W10[4:0]
W11 - data write register bit allocation
W11 - data write register bit description
Symbol
XPOTPOS
TOPPOS[4:0] TOP adjustment for TAGC derived from IF AGC (TOP2); recommended for positive
Symbol
-
OFFSETN
OFFSETP
BLACKAGC
GDEQ
VIFIN3
for parameter tuner takeover point accuracy (
TOPPOS3
W10[3]
1
:
0
:
0
6
0
Description
TOP derived from IF AGC via I
modulation; see
Description
0 = fixed value
VIF PLL offset sink current (approximately 0.6 A)
VIF PLL offset source current (approximately 0.6 A)
black level AGC
activate group delay equalizer
VIF input selection
OFFSETN
1 = TOP adjustment by external potentiometer at pin TOP2
0 = see
1 = enabled (requires W11[4] = 0)
0 = disabled
1 = enabled (requires W11[5] = 0)
0 = disabled
1 = disabled
0 = enabled
1 = on (if pin 34 is open-circuit)
1 = off (if pin 34 is connected to ground)
0 = off (if pin 34 is open-circuit)
0 = on (if pin 34 is connected to ground)
1 = IF3A and IF3B input
0 = IF1A and IF1B input or IF2A and IF2B input depends on VIF input selection (W4[0])
5
TOPPOS2
W10[2]
1
:
0
:
0
Table 48
OFFSETP
Table 48
Rev. 04 — 25 May 2009
4
[1]
…continued
acc(set)TOP2
TOPPOS1
W10[1]
1
:
0
:
0
2
BLACKAGC
C-bus or potentiometer (TOP2)
).
3
TDA9897; TDA9898
GDEQ
Multistandard hybrid IF processing
TOPPOS0
W10[0]
1
:
0
:
0
2
VIFIN3
1
© NXP B.V. 2009. All rights reserved.
TOP adjustment
(dB V)
99.0 typical
see
78.5
see
56.9 typical
Figure 13
Figure 13
[1]
VIF31875
38 of 103
0

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