74AUP1G34GW,125 NXP Semiconductors, 74AUP1G34GW,125 Datasheet - Page 10

• Manufacturer Part Number: 74AUP1G34GW,125
• Description: IC BUFFER LOW PWR N-INV 5TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74AUPr

Specifications of 74AUP1G34GW,125

• Package / Case: SC-70-5, SC-88A, SOT-323-5, SOT-353, 5-TSSOP
• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 1
• Number Of Bits Per Element: 1
• Current - Output High, Low: 4mA, 4mA
• Voltage - Supply: 0.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Logic Family: AUP
• Number Of Channels Per Chip: 1
• Polarity: Non-Inverting
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 0.8 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 4 mA
• Low Level Output Current: 4 mA
• Maximum Power Dissipation: 250 mW
• Minimum Operating Temperature: - 40 C
• Output Current: 20 mA
• Output Voltage: 4.6 V
• Propagation Delay Time: 16.3 ns @ 1.1 V to 1.3 V or 10.3 ns @ 1.4 V to 1.6 V or 8.1 ns @ 1.65 V to 1.95 V or 6.4 ns @ 2.3 V to 2.7 V or 5.6 ns @ 3 V to 3.6 V
• Number Of Lines (input / Output): 1 / 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-2565-2; 935279028125

NXP Semiconductors
Table 10.
[1]
74AUP1G34
Product data sheet
Supply voltage
V
0.8 V to 3.6 V
Fig 8.
CC
For measuring enable and disable times R
Test data is given in
Definitions for test circuit:
R
C
R
V
Test circuit for measuring switching times
L
L
T
EXT
Test data
= Load resistance.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to the output impedance Z
= External voltage for measuring switching times.
Load
C
5 pF, 10 pF, 15 pF and 30 pF
L
Table
10.
L
All information provided in this document is subject to legal disclaimers.
G
= 5 k, for measuring propagation delays, setup and hold times and pulse width R
V I
Rev. 4 — 14 July 2010
R T
R
5 k or 1 M
L
DUT
V
[1]
CC
V O
C L
o
001aac521
V
t
open
of the pulse generator.
PLH
V
EXT
EXT
5 kΩ
R L
, t
PHL
t
GND
PZH
74AUP1G34
, t
PHZ
Low-power buffer
© NXP B.V. 2010. All rights reserved.
t
2  V
PZL
, t
CC
PLZ
L
10 of 19
= 1 M.