74AHCT541PW,118 NXP Semiconductors, 74AHCT541PW,118 Datasheet - Page 3

• Manufacturer Part Number: 74AHCT541PW,118
• Description: IC BUFF/DVR TRI-ST 8BIT 20TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74AHCTr

Specifications of 74AHCT541PW,118

• Package / Case: 20-TSSOP
• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Current - Output High, Low: 8mA, 8mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Logic Family: AHCT
• Number Of Channels Per Chip: 8
• Polarity: Non-Inverting
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 8 mA
• Low Level Output Current: 8 mA
• Minimum Operating Temperature: - 40 C
• Output Type: 3-State
• Propagation Delay Time: 8.5 ns @ 5 V
• Number Of Lines (input / Output): 8 / 8
• Logical Function: Buffer/Line Driver
• Number Of Elements: 1
• Number Of Channels: 8
• Number Of Inputs: 8
• Number Of Outputs: 8
• Operating Supply Voltage (typ): 5V
• Package Type: TSSOP
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Quiescent Current: 4uA
• Technology: CMOS
• Pin Count: 20
• Mounting: Surface Mount
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74AHCT541PW-T; 74AHCT541PW-T; 935261978118

NXP Semiconductors
5. Pinning information
Table 2.
74AHC_AHCT541_3
Product data sheet
Symbol
OE0
A[0:7]
GND
Y[0:7]
OE1
V
Fig 3. Pin configuration SO20, TSSOP20
CC
Pin description
GND
OE0
A0
A1
A2
A3
A4
A5
A6
A7
Pin
1
2, 3, 4, 5, 6, 7, 8, 9
10
18, 17, 16, 15, 14, 13, 12, 11 data output
19
20
10
1
2
3
4
5
6
7
8
9
5.1 Pinning
5.2 Pin description
74AHCT541
74AHC541
001aah038
20
19
18
17
16
15
14
13
12
11
Description
output enable input (active LOW)
data input
ground (0 V)
output enable input (active LOW)
supply voltage
V
OE1
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
CC
Rev. 03 — 12 November 2007
Fig 4. Pin configuration DHVQFN20
(1) The die substrate is attached to this pad using
74AHC541; 74AHCT541
conductive die attach material. It can not be used as
a supply pin or input.
index area
terminal 1
A0
A1
A2
A3
A4
A5
A6
A7
Transparent top view
2
3
4
5
6
7
8
9
Octal buffer/line driver; 3-state
74AHCT541
74AHC541
GND
(1)
19
18
17
16
15
14
13
12
001aah039
© NXP B.V. 2007. All rights reserved.
OE1
Y0
Y1
Y2
Y3
Y4
Y5
Y6
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