74AUP1G34GM,132 NXP Semiconductors, 74AUP1G34GM,132 Datasheet

IC BUFFER LOW PWR N-INV 6XSON

74AUP1G34GM,132

Manufacturer Part Number
74AUP1G34GM,132
Description
IC BUFFER LOW PWR N-INV 6XSON
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP1G34GM,132

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
1
Number Of Bits Per Element
1
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
6-XSON (Micropak™), SOT-886
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74AUP1G34GM-H
74AUP1G34GM-H
935279029132
1. General description
2. Features and benefits
The 74AUP1G34 provides a low-power, low-voltage single buffer.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
This device ensures a very low static and dynamic power consumption across the entire
V
This device is fully specified for partial power-down applications using I
The I
the device when it is powered down.
CC
74AUP1G34
Low-power buffer
Rev. 4 — 14 July 2010
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
ESD protection:
Low static power consumption; I
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
I
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
OFF
range from 0.8 V to 3.6 V.
OFF
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
circuitry provides partial power-down mode operation
circuitry disables the output, preventing the damaging backflow current through
CC
range from 0.8 V to 3.6 V.
CC
= 0.9 A (maximum)
CC
Product data sheet
OFF
.

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74AUP1G34GM,132 Summary of contents

Page 1

Low-power buffer Rev. 4 — 14 July 2010 1. General description The 74AUP1G34 provides a low-power, low-voltage single buffer. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire ...

Page 2

... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 40 C to +125 C 74AUP1G34GW 40 C to +125 C 74AUP1G34GM 40 C to +125 C 74AUP1G34GF 40 C to +125 C 74AUP1G34GN 40 C to +125 C 74AUP1G34GS 4. Marking Table 2. Marking ...

Page 3

... NXP Semiconductors 6. Pinning information 6.1 Pinning 74AUP1G34 GND 001aac535 Fig 4. Pin configuration SOT353-1 6.2 Pin description Table 3. Pin description Symbol Pin TSSOP5 n. GND n. Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level. 74AUP1G34 Product data sheet 74AUP1G34 n ...

Page 4

... NXP Semiconductors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK V input voltage I I output clamping current OK V output voltage O I output current ...

Page 5

... NXP Semiconductors 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter = 25 C T amb V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current I I power-off leakage current OFF  ...

Page 6

... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current I I power-off leakage current OFF I ...

Page 7

... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter = 40 C to +125 C T amb V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current I I power-off leakage current OFF  ...

Page 8

... NXP Semiconductors 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions propagation see pd delay propagation see pd delay propagation see pd delay propagation see pd delay 74AUP1G34 Product data sheet Figure T amb Min Typ [2] Figure ...

Page 9

... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions C power MHz dissipation V = GND capacitance [1] All typical values are measured at nominal V [ the same as t and PLH PHL [ used to determine the dynamic power dissipation (P PD  ...

Page 10

... NXP Semiconductors Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to the output impedance External voltage for measuring switching times. EXT Fig 8. Test circuit for measuring switching times Table 10. ...

Page 11

... NXP Semiconductors 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1. DIMENSIONS (mm are the original dimensions UNIT max. 0.1 1.0 mm 1.1 0.15 0 0.8 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION IEC SOT353-1 Fig 9 ...

Page 12

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. 6× (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 1.5 mm 0.5 0.04 0.17 1.4 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. ...

Page 13

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 0 6× (1) terminal 1 index area DIMENSIONS (mm are the original dimensions UNIT b D max max 0.20 1.05 mm 0.5 0.04 0.12 0.95 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION IEC SOT891 Fig 11 ...

Page 14

... NXP Semiconductors XSON6: extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1 (6×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 0.95 mm nom 0.15 0.90 min 0.12 0.85 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...

Page 15

... NXP Semiconductors XSON6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1 (6×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 1.05 mm nom 0.15 1.00 min 0.12 0.95 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...

Page 16

... NXP Semiconductors 14. Abbreviations Table 11. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 15. Revision history Table 12. Revision history Document ID Release date 74AUP1G34 v.4 20100714 • Modifications: Added type number 74AUP1G34GN (SOT1115/XSON6 package). ...

Page 17

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 18

... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 17. Contact information For more information, please visit: For sales office addresses, please send an email to: 74AUP1G34 Product data sheet 16 ...

Page 19

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 13 Package outline ...

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