HCPL316J500E AVAGO TECH, HCPL316J500E Datasheet - Page 28

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HCPL316J500E

Manufacturer Part Number
HCPL316J500E
Description
Manufacturer
AVAGO TECH
Datasheet
User-Configuration of the HCPL-316J Output Side R
Optional Resistor R
The value of the gate resistor R
determines the maximum amount of gate-charging/dis-
charging current (I
be carefully chosen to match the size of the IGBT being
driven. Often it is desirable to have the peak gate charge
current be somewhat less than the peak discharge cur-
rent (I
resistor (R
determine I
diode. As an example, refer to Figure 74. Assuming that
R
Figure 74. Use of R
Figure 73c. Safe hardware reset for inverting input configuration.
28
HCPL-316J
G
is already determined and that the design I
ON,PEAK
C
V
DESAT
LED2+
) can be used along with R
V
V
ON,PEAK
OUT
CC2
V
V
C
V
V
EE
EE
to further limit I
< I
C
E
OFF,PEAK
16
15
14
13
12
11
10
9
ON,PEAK
C
and I
:
10 Ω
10 nF
R
OFF,PEAK
100 pF
). For this condition, an optional
ON,PEAK
C
15 V
8 Ω
and I
.
G
OFF,PEAK
(along with V
without using a steering
-5 V
G
) and thus should
to independently
CC2
OH,PEAK
and V
G
and
EE
=
)
0.5 A, the value of R
way:
R
See “Power and Layout Considerations” section for more
information on calculating value of R
Figure 73d. Safe hardware reset for inverting input configuration (automati-
cally resets for every V
C
+ R
G
= [4 V – (-5 V)]
= 18 Ω
) R
= [V
C
CC2
= 8 Ω
0.5 A
I
OH,PEAK
IN-
– V
input).
OH
C
– (V
can be estimated in the following
EE
)]
G
.

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