74LV241D,112 NXP Semiconductors, 74LV241D,112 Datasheet - Page 8

• Manufacturer Part Number: 74LV241D,112
• Description: IC BUFF/DVR TRI-ST DUAL 20SOIC
• Manufacturer: NXP Semiconductors
• Series: 74LVr

Specifications of 74LV241D,112

• Package / Case: 20-SOIC (7.5mm Width)
• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 2
• Number Of Bits Per Element: 4
• Current - Output High, Low: 8mA, 8mA
• Voltage - Supply: 1 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Logic Family: 74LV
• Number Of Channels Per Chip: 8
• Polarity: Non-Inverting
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 8 mA
• Input Bias Current (max): 160 uA
• Low Level Output Current: 8 mA
• Minimum Operating Temperature: - 40 C
• Output Type: 3-State
• Propagation Delay Time: 8 ns
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-2937-5; 935186090112

Philips Semiconductors
Table 8:
Voltages are referenced to GND (ground = 0 V); C
[1]
[2]
[3]
12. Waveforms
74LV241_3
Product data sheet
Symbol
t
t
PZH
PHZ
, t
, t
All typical values are measured at T
These typical values are measured at V
C
P
f
f
C
V
N = number of inputs switching;
i
o
(C
D
CC
PD
= input frequency in MHz;
L
PZL
PLZ
= output frequency in MHz;
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
PD
V
Dynamic characteristics
CC
Parameter
3-state output enable time
1OE to 1Yn, 2OE to 2Yn
3-state output disable time
1OE to 1Yn, 2OE to 2Yn
2
V
CC
f
o
2
) = sum of the outputs.
f
i
N + (C
Fig 5. Input (1An, 2An) to output (1Yn, 2Yn) propagation delay
L
For measurement points see
V
V
OL
CC
amb
2
…continued
and V
CC
= 25 C
f
Conditions
see
see
o
= 3.3 V
) where:
OH
V
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
CC
CC
Figure 6
Figure 6
are the typical output voltage drop that occur with the output load
1Yn, 2Yn output
= 1.2 V
= 2.0 V
= 2.7 V
= 3.0 V to 3.6 V
= 1.2 V
= 2.0 V
= 2.7 V
= 3.0 V to 3.6 V
1An, 2An input
Rev. 03 — 10 October 2005
L
= 50 pF; unless otherwise stated; for test circuit see
and
and
D
in W).
Figure 7
Figure 7
GND
V
V
Table 9
OH
OL
V
I
V
M
V
M
t
PHL
Min
-
-
-
-
-
-
-
-
Octal buffer/line driver; 3-state
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
mna774
t
Typ
-
-
-
-
-
-
-
-
PLH
Figure 8
74LV241
Max
-
44
33
26
-
48
36
29
Unit
ns
ns
ns
ns
ns
ns
ns
ns
8 of 17