74AUP1G125GM,115 NXP Semiconductors, 74AUP1G125GM,115 Datasheet
74AUP1G125GM,115
Specifications of 74AUP1G125GM,115
935279055115
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74AUP1G125GM,115 Summary of contents
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Low-power dual buffer/line driver; 3-state Rev. 7 — 21 September 2010 1. General description The 74AUP2G125 provides the dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A HIGH level ...
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... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name −40 °C to +125 °C 74AUP2G125DC −40 °C to +125 °C 74AUP2G125GT −40 °C to +125 °C 74AUP2G125GF −40 °C to +125 °C 74AUP2G125GD −40 °C to +125 °C 74AUP2G125GM −40 °C to +125 °C 74AUP2G125GN − ...
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... NXP Semiconductors Fig 3. Logic diagram (one gate) 6. Pinning information 6.1 Pinning 74AUP2G125 1OE GND 4 001aae973 Fig 4. Pin configuration SOT765-1 74AUP2G125 1OE GND 4 Transparent top view Fig 6. Pin configuration SOT996-2 74AUP2G125 Product data sheet nA nOE 2OE Fig 5. Pin configuration SOT833-1, SOT1089, SOT1116 and SOT1203 ...
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... NXP Semiconductors 6.2 Pin description Table 3. Pin description Symbol Pin SOT765-1, SOT833-1, SOT1089, SOT996-2, SOT1116 and SOT1203 1OE, 2OE GND 4 1Y Functional description [1] Table 4. Function table Input nOE [ HIGH voltage level LOW voltage level don’t care high-impedance OFF-state. 8. Limiting values Table 5 ...
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... NXP Semiconductors 9. Recommended operating conditions Table 6. Operating conditions Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb Δt/ΔV input transition rise and fall rate 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). ...
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... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter I input leakage current I I OFF-state output current OZ I power-off leakage current OFF ΔI additional power-off OFF leakage current I supply current CC ΔI additional supply current CC C input capacitance ...
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... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V LOW-level output voltage OL I input leakage current I I OFF-state output current OZ I power-off leakage current OFF ΔI additional power-off OFF leakage current I supply current CC ΔI ...
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... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V LOW-level output voltage OL I input leakage current I I OFF-state output current OZ I power-off leakage current OFF ΔI additional power-off OFF leakage current I supply current CC ΔI ...
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... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t enable time nOE to nY; see en t disable time nOE to nY; see dis propagation delay nA to nY; see pd t enable time nOE to nY; see en t disable time nOE to nY ...
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... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions propagation delay nA to nY; see pd t enable time nOE to nY; see en t disable time nOE to nY; see dis propagation delay nA to nY; see pd t enable time nOE to nY ...
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... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t disable time nOE to nY; see dis pF and power dissipation output enabled capacitance V I [1] All typical values are measured at nominal V [ the same as t and t ...
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... NXP Semiconductors 12. Waveforms Measurement points are given in Logic levels: V and Fig 8. The data input (nA) to output (nY) propagation delays Table 9. Measurement points Supply voltage Output 0.5 × 3.6 V nOE input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH Measurement points are given in Logic levels: V ...
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... NXP Semiconductors Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to the output impedance External voltage for measuring switching times. EXT Fig 10. Test circuit for measuring switching times Table 11. ...
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... NXP Semiconductors 13. Package outline VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0. 0.12 0.00 0.60 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1. 8× (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 2.0 mm 0.5 0.04 0.17 1.9 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. ...
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... NXP Semiconductors XSON8: extremely thin small outline package; no leads; 8 terminals; body 1. 0.5 mm terminal 1 index area (2) (4× terminal 1 index area Dimensions (1) Unit max 0.5 0.04 0.20 1.40 mm nom 0.15 1.35 min 0.12 1.30 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...
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... NXP Semiconductors XSON8U: plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 0.5 mm terminal 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max 0.05 0.35 2.1 mm 0.5 0.00 0.15 1.9 OUTLINE VERSION IEC SOT996 Fig 14. Package outline SOT996-2 (XSON8U) ...
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... NXP Semiconductors XQFN8U: plastic extremely thin quad flat package; no leads; 8 terminals; UTLP based; body 1.6 x 1.6 x 0.5 mm terminal 1 index area metal area not for soldering 2 1 terminal 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max 0.05 0.25 1.65 mm 0.5 0.00 ...
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... NXP Semiconductors XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.2 x 1 (2) (8×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 1.25 mm nom 0.15 1.20 min 0.12 1.15 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...
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... NXP Semiconductors XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.35 x 1 (2) (8×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 1.40 mm nom 0.15 1.35 min 0.12 1.30 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...
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... NXP Semiconductors 14. Abbreviations Table 12. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 15. Revision history Table 13. Revision history Document ID Release date 74AUP2G125 v.7 20100921 • Modifications: Added type number 74AUP2G125GN (SOT1116/XSON8 package). ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 17. Contact information For more information, please visit: For sales office addresses, please send an email to: 74AUP2G125 Product data sheet 16 ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 4 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 13 Package outline ...