74LVT16244BDGG,118 NXP Semiconductors, 74LVT16244BDGG,118 Datasheet - Page 10

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74LVT16244BDGG,118

Manufacturer Part Number
74LVT16244BDGG,118
Description
IC BUFF DVR TRI-ST 16BIT 48TSSOP
Manufacturer
NXP Semiconductors
Series
74LVTr
Datasheet

Specifications of 74LVT16244BDGG,118

Logic Type
Buffer/Line Driver, Non-Inverting
Package / Case
48-TSSOP
Number Of Elements
4
Number Of Bits Per Element
4
Current - Output High, Low
32mA, 64mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Logic Family
LVT
Number Of Channels Per Chip
16
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Input Bias Current (max)
6000 uA
Low Level Output Current
64 mA
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
1.8 ns (Typ) @ 3.3 V
Logical Function
Buffer/Line Driver
Number Of Elements
4
Number Of Channels
16
Number Of Inputs
16
Number Of Outputs
16
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2.7V
Quiescent Current
6mA
Technology
BiCMOS
Pin Count
48
Mounting
Surface Mount
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Number Of Lines (input / Output)
16 / 16
Package Type
TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935202990118
NXP Semiconductors
Table 9.
74LVT_LVTH16244B_8
Product data sheet
Input
V
2.7 V
Fig 8.
I
Test data is given in
Definitions test circuit:
R
C
R
V
Load circuit for measuring switching times
L
L
T
EXT
Test data
f
≤ 10 MHz
= Load resistance.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to output impedance Z
i
= External voltage for measuring switching times.
Table
t
500 ns
W
9.
negative
positive
pulse
pulse
GENERATOR
0 V
0 V
V
V
I
I
PULSE
All information provided in this document is subject to legal disclaimers.
t
≤ 2.5 ns
r
90 %
10 %
, t
f
Rev. 08 — 22 March 2010
t
t
r
f
74LVT16244B; 74LVTH16244B
V
V
V
M
M
10 %
90 %
I
Load
C
50 pF
L
R T
V
DUT
t
t
W
W
CC
R
500 Ω
o
L
of the pulse generator.
V
O
V
V
M
M
t
t
r
f
C L
001aae235
V
t
GND
V
PHZ
EXT
EXT
3.3 V 16-bit buffer/driver; 3-state
, t
R L
R L
PZH
t
6 V
PLZ
, t
PZL
© NXP B.V. 2010. All rights reserved.
t
open
PLH
, t
PHL
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