74LV541D,112 NXP Semiconductors, 74LV541D,112 Datasheet - Page 2

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74LV541D,112

Manufacturer Part Number
74LV541D,112
Description
IC BUFF/DVR TRI-ST 8BIT 20SOIC
Manufacturer
NXP Semiconductors
Series
74LVr
Datasheet

Specifications of 74LV541D,112

Package / Case
20-SOIC (7.5mm Width)
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
1
Number Of Bits Per Element
8
Current - Output High, Low
8mA, 8mA
Voltage - Supply
1 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
LV
Number Of Channels Per Chip
8
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 8 mA
Input Bias Current (max)
160 uA
Low Level Output Current
8 mA
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
60 ns (Typ) @ 1.2 V or 20 ns (Typ) @ 2 V or 15 ns (Typ) @ 2.7 V or 11 ns (Typ) @ 3.3 V
Number Of Lines (input / Output)
8 / 8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LV541D
74LV541D
935088020112
NXP Semiconductors
4. Functional diagram
5. Pinning information
74LV541_3
Product data sheet
Fig 1.
Fig 3.
Logic symbol
Pin configuration DIP20, SO20
GND
OE1
A0
A1
A2
A3
A4
A5
A6
A7
5.1 Pinning
10
1
2
3
4
5
6
7
8
9
19
2
3
4
5
6
7
8
9
1
OE1
OE2
A0
A1
A2
A3
A4
A5
A6
A7
74LV541
001aaj964
mna900
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
18
17
16
15
14
13
12
11
20
19
18
17
16
15
14
13
12
11
V
OE2
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
CC
Rev. 03 — 14 April 2009
Fig 2.
Fig 4.
IEC logic symbol
Pin configuration, (T)SSOP20
GND
OE1
A0
A1
A2
A3
A4
A5
A6
A7
10
1
2
3
4
5
6
7
8
9
19
1
2
3
4
5
6
7
8
9
Octal buffer/line driver; 3-state
&
74LV541
mna180
EN
001aaj965
18
17
16
15
14
13
12
11
© NXP B.V. 2009. All rights reserved.
74LV541
20
19
18
17
16
15
14
13
12
11
V
OE2
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
CC
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