MSDC22D-38KX3 Kingmax Semiconductor, MSDC22D-38KX3 Datasheet - Page 8

• Manufacturer Part Number: MSDC22D-38KX3
• Description: DRAM Module, 512 MB PC-2100 DDR SO-DIMM
• Manufacturer: Kingmax Semiconductor

Note : 1. Maximum burst refresh of 8
Kingmax - Memory Module
Mode register set cycle time
DQ & DM setup time to DQS
DQ & DM hold time to DQS
DQ & DM input pulse width
Power down exit time
Exit self refresh to write command
Exit self refresh to bank active command
Exit self refresh to read command
Refresh interval time
Output DQS valid window
Clock half period
Data hold skew factor
DQS write post amble time
2. The specific requirement is that DQS be valid (High or Low) on or before this CK edge. The
3. The maximum limit for this parameter is not a device limit. The device will operate with a
4. A write command can be applied with tRCD satisfied after this command.
5. For registered DIMMs, tCL and tCH are
6. Input Setup/Hold Slew Rate Derating
case shown (DQS going from High_Z to logic Low) applies when no writes were previously
in progress on the bus. If a previous write was in progress, DQS could be High at this time,
depending on tDQSS.
great value for this parameter, but system performance (bus turnaround) will degrade
accordingly.
jitter (tJIT(HP)) of the PLL and the half period jitter due to cross talk (tJIT(crosstalk)) on the
DIMM.
This derating table is used to increase tIS /tIH in the case where the input slew rate is below
0.5V/ns. Input setup/hold slew rate based on the lesser of AC-AC slew rate and DC-DC
slew rate.
Input Setup/Hold Slew Rate (V/ns)
Parameter
0.5
0.4
0.3
Symbol
tDIPW
tPDEX
tWPST
tMRD
tXSW
tXSA
tQHS
tXSR
tREF
tDH
tQH
tDS
tHP
512MB PC-2100 DDR SO-DIMM
45% of the period including both the half period
8
tIS (ps)
+100
+50
0
or tCHmin
tHPmin
- tQHS
tCLmin
Min
1.75
0.25
200
0.5
0.5
7.8
15
10
95
75
tIH (ps)
+100
+50
MSDC22D-38KX3
May 2002 Rev: 1.0
0
Max
0.75
Cycle
Unit Note
tCK
ns
ns
ns
ns
ns
ns
ns
us
ns
ns
ns
7,8,9
7,8,9
4
1
5
3