HFA3863IN96 Intersil Corporation, HFA3863IN96 Datasheet - Page 35

• Manufacturer Part Number: HFA3863IN96
• Description: Processor, Direct Sequence Spread Spectrum Base band Processor with Rake Receiver and Equalizer, Tape And Reel
• Manufacturer: Intersil Corporation

Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.0V
Input, Output or I/O Voltage . . . . . . . . . . . . GND -0.5V to V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Operating Conditions
Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2.70V to +3.60V
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
DC Electrical Specifications
NOTES:
AC Electrical Specifications
Power Supply Current
Standby Power Supply Current
Input Leakage Current
Output Leakage Current
Logical One Input Voltage
Logical Zero Input Voltage
Logical One Output Voltage
Logical Zero Output Voltage
Input Capacitance
Output Capacitance
MCLK Period
MCLK Duty Cycle
Rise/Fall (All Outputs)
TX_PE to I
TX_PE Inactive Width
TX_CLK Width Hi or Low
TX_RDY Active to 1st TX_CLK Hi
Setup TXD to TX_CLK Hi
Hold TXD to TX_CLK Hi
TX_CLK to TX_PE Inactive (1Mbps)
TX_CLK to TX_PE Inactive (2Mbps)
TX_CLK to TX_PE Inactive (5.5Mbps)
3. θ
4. Output load 40pF.
5. Not tested, but characterized at initial design and at major process/design changes.
6. User must allow for a peak current of 100mA that lasts for 20µs when CIR estimate is being calculated.
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air (see Tech Brief TB379 for details).
PARAMETER
OUT
/Q
OUT
PARAMETER
(1st Valid Chip)
35
SYMBOL
I
I
V
C
V
CCOP
CCSB
V
V
C
V
CC
V
CC
OUT
I
OH
I
O
OL
IH
IN
I
IL
= 3.0V to 3.3V ±10%, T
= 3.0V to 3.3V ±10%, T
V
(Notes 5, 6, 7)
V
V
V
V
V
I
I
CLK Frequency 1MHz. All measurements
referenced to GND. T
OH
OL
CC
CC
CC
CC
CC
CC
= 2mA, V
= -1mA, V
o
= 3.6V, CLK Frequency 44MHz
= Max, Outputs Not Loaded
= Max, Input = 0V or V
= Max, Input = 0V or V
= Max, Min
= Min, Max
C to 85
CC
+0.5V
TEST CONDITIONS
o
CC
HFA3863
C
CC
SYMBOL
A
A
t
t
t
t
t
t
= Min
t
t
TCD
t
TDS
TDH
PEH
PEH
PEH
t
TLP
= Min
RC
CP
D1
= -40
= -40
A
= 25
o
o
C to 85
C to 85
Thermal Information
Thermal Resistance (Typical, Note 3)
Maximum Storage Temperature Range . . . . . . . . . . -65
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200,000 Gates
CC
CC
o
TQFP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(Lead Tips Only)
C, (Note 5, 6)
o
o
C
C (Note 8)
40/60
22.5
2.18
2.22
MIN
260
40
30
0
0
0
0
-
MCLK = 44MHz
V
0.7 V
CC
MIN
-10
-10
-
-
-
-
-
-
-0.2
CC
60/40
MAX
965
420
160
2.3
10
-
-
-
-
-
-
TYP
0.5
0.1
50
1
1
5
5
-
-
-
V
MAX
CC
0.2
60
10
10
10
10
10
-
-
µs (Notes 10)
µs (Note 11)
ns (Note 19)
ns (Note 19)
ns (Note 19)
/3
ns (Note 9)
UNITS
o
ns
ns
ns
ns
ns
%
θ
C to 150
JA
UNITS
(
mA
mA
60
µA
µA
pF
pF
o
V
V
V
V
C/W)
o
o
o
C
C
C