CC2420 Chipcon AS, CC2420 Datasheet - Page 28

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CC2420

Manufacturer Part Number
CC2420
Description
2.4 GHz RF Transceiver for IEEE 802.15.4 and ZigBee
Manufacturer
Chipcon AS
Datasheet

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illustrated in Figure 10. The only exception
is that FIFO and RAM access must be
Microcontroller Interface and Pin Description
When used in a typical system,
interface
microcontroller must be able to:
• Program
• Interface to the receive and transmit
• Interface to the CCA pin for clear
• Interface to the SFD pin for timing
Configuration interface
A
example is shown in Figure 11. The
microcontroller uses 4 I/O pins for the SPI
configuration interface (SI, SO, SCLK and
Chipcon AS SmartRF® CC2420 Preliminary Datasheet (rev 1.0), 2003-11-17
read and write buffered data, and read
back status information via the 4-wire
SPI-bus configuration interface (SI, SO,
SCLK and CSn).
FIFOs using the FIFO and FIFOP
status pins.
channel assessment.
information (particularly for beaconing
networks).
CC2420
CSn
to
SO
to microcontroller interface
CC2420
SI
a
Command
ADDR
Status
Strobe
microcontroller.
into different modes,
Figure 10. Multiple SPI Access Example
ADDR
Status
CC2420
Register
DATA
Read
-
8MSB
This
will
DATA
-
8LSB
SmartRF
ADDR
terminated by setting CSn high.
CSn). SO should be connected to an input
at the microcontroller. SI, SCLK and CSn
must
Preferably the microcontroller should have
a hardware SPI interface.
The microcontroller pins connected to SI,
SO and SCLK can be shared with other
SPI-interface devices. SO is a high
impedance output as long as CSn is not
activated (active low). An internal pull-up
on the SO pin may be enabled in the
IOCFG0.SO_PULLUP configuration bit.
CSn should have an external pull-up
resistor or be set to a high level during
power down mode in order to prevent the
input from floating. SI and SCLK should be
set to a defined level to prevent the inputs
from floating.
Status
TXFIFO
DATA
Status
be
ADDR
TXFIFO
Write
DATA
Status
microcontroller
ADDR+1
®
DATA
Status
CC2420
ADDR+2
Page 28 of 85
outputs.

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