CS61310-CL Cirrus Logic, Inc., CS61310-CL Datasheet - Page 3

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CS61310-CL

Manufacturer Part Number
CS61310-CL
Description
Interface, T1 Line Interface Unit
Manufacturer
Cirrus Logic, Inc.
Datasheet
LIST OF FIGURES
LIST OF TABLES
DS440F1 FEB ‘03
3. ARBITRARY WAVEFORM GENERATION ............................................................................ 17
4. PIN DESCRIPTION ................................................................................................................. 20
5. PACKAGE DIMENSIONS ...................................................................................................... 25
6. APPLICATIONS ..................................................................................................................... 27
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10. Input/Output Timing (showing address 0x10) ............................................................ 13
Figure 11. Phase Definition of Arbitrary Waveforms ................................................................... 17
Figure 12. Example of Summing of Waveforms .......................................................................... 17
Figure 13. Hardware Mode Operation ......................................................................................... 27
Figure 14. Matched Impedence Output Configuration ................................................................ 28
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Signal Rise and Fall Characteristics ............................................................................ 7
Recovered Clock and Data Switching Characteristics ................................................. 7
Transmit Clock and Data Switching Characteristics .................................................... 7
Serial Port Write Timing Diagram ................................................................................ 8
Serial Port Read Timing Diagram ................................................................................ 8
Typical Pulse Shape for DS-1 ...................................................................................... 9
Minimum Input Jitter Tolerance of Receiver .............................................................. 10
Typical Jitter Transfer Function .................................................................................. 11
LATN Pulse Width encoding ...................................................................................... 11
Pulse Shape Selection and Transformer Requirements ............................................... 9
Data Output/Clock Relationship.................................................................................. 10
Register Map............................................................................................................... 13
Register 16 Decoding ................................................................................................. 15
CS61310 Diagnostic Mode Availability ....................................................................... 18
Transformer Specification ........................................................................................... 19
Recommended Tranformers for the CS61310 ............................................................ 19
CS61310
3

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