FPD750SOT89CE Filtronic, FPD750SOT89CE Datasheet - Page 2

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FPD750SOT89CE

Manufacturer Part Number
FPD750SOT89CE
Description
LOW NOISE HIGH LINEARITY PACKAGED PHEMT
Manufacturer
Filtronic
Datasheet
A
Notes:
1
permanent damage to the device
2
3
4
Example: For a 65°C carrier temperature: P
B
Total Power Dissipation to be de-rated as follows above 22°C:
T
Max. RF Input Limit must be further limited if input VSWR > 2.5:1
Users should avoid exceeding 80% of 2 or more Limits simultaneously
Total Power Dissipation defined as: P
Simultaneous Combination of Limits
BSOLUTE
Ambient
IASING
Tel: +44 (0) 1325 301111
Channel Operating Temperature
Active bias circuits provide good performance stabilization over variations of operating
temperature, but require a larger number of components compared to self-bias or dual-biased.
Such circuits should include provisions to ensure that Gate bias is applied before Drain bias,
otherwise the pHEMT may be induced to self-oscillate
Dual-bias circuits are relatively simple to implement, but will require a regulated negative voltage
supply for depletion-mode devices.
For standard class A operation, a 50% of IDSS bias point is recommended. A small amount of
RF gain expansion prior to the onset of compression is normal for this operating point. A class
A/B Bias of 25-33% of IDSS to achieve better OIP3, and Noise Figure performance is suggested.
Total Power Dissipation
Drain-Source Voltage
Drain-Source Current
= 22°C unless otherwise noted; exceeding any one of these absolute maximum ratings may cause
Gate-Source Voltage
Storage Temperature
P
where P
P
where T
(coefficient of de-rating formula is the Thermal Conductivity)
Gain Compression
RF Input Power
TOT
ARAMETER
Gate Current
G
UIDELINES
= 1.8 - (0.012W/°C) x T
M
AXIMUM
PACK
DC
2
: DC Bias Power, P
= source tab lead temperature above 22°C
:
R
3
ATING
Fax: +44 (0) 1325 306177
1
Specifications subject to change without notice
PACK
:
Filtronic Compound Semiconductors Ltd
S
TOT
YMBOL
IN
Comp.
TSTG
PTOT
VDS
VGS
TCH
IDS
PIN
IG
: RF Input Power, P
≡ (P
TOT
DC
= 1.8W – (0.012 x (65 – 22)) = 1.28W
+ P
IN
) – P
2
Under any acceptable bias state
Under any acceptable bias state
T
Forward or reverse current
See De-Rating Note below
Under any bias conditions
OUT
EST
2 or more Max. Limits
Email: sales@filcs.com
Non-Operating Storage
OUT
-3V < VGS < +0V
0V < VDS < +8V
,
For VDS < 2V
: RF Output Power
C
ONDITIONS
FPD750SOT89
Website:
A
BSOLUTE
-55°C to 150°C
www.filtronic.com
175mW
7.5mA
175°C
IDSS
1.8W
-3V
5dB
8V
M
AXIMUM
Datasheet v3.0

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