P3Z22V10 NXP Semiconductors, P3Z22V10 Datasheet - Page 2

• Manufacturer Part Number: P3Z22V10
• Description: 3v Zero Power, Totalcmos, Universal Pld Device
• Manufacturer: NXP Semiconductors

Philips Semiconductors
FEATURES
ORDERING INFORMATION
1997 Jul 18
P3Z22V10-DA
P3Z22V10-DD
P3Z22V10-DDH
P3Z22V10-BA
P3Z22V10-BD
P3Z22V10-BDH
P3Z22V10IBA
P3Z22V10IBD
P3Z22V10IBDH
Industry’s first TotalCMOS 22V10 – both CMOS design and
process technologies
Fast Zero Power (FZP ) design technique provides ultra-low
power and high speed
– Static current of less than 45 A
– Dynamic current 1/10 to 1/1000 that of competitive devices
– Pin-to-pin delay of only 10ns
True Zero Power device with no turbo bits or power down
schemes
Function/JEDEC map compatible with
Bipolar, UVCMOS, EECMOS 22V10s
Multiple packaging options featuring PCB-friendly flow-through
pinouts (SOL and TSSOP)
– 24-pin TSSOP—uses 93% less in-system space than a 28-pin
– 24-pin SOL
– 28-pin PLCC with standard JEDEC pin-out
Available in commercial and industrial operating ranges
Supports mixed voltage systems–5V tolerant I/Os
Advanced 0.5 E
1000 erase/program cycles guaranteed
20 years data retention guaranteed
Varied product term distribution with up to 16 product terms per
output for complex functions
3V zero power, TotalCMOS , universal PLD device
PLCC
ORDER CODE
2
CMOS process
28-pin PLCC
24-pin SOL
24-pin TSSOP
28-pin PLCC
24-pin SOL
24-pin TSSOP
28-pin PLCC
24-pin SOL
24-pin TSSOP
PACKAGE
PROPAGATION
DELAY
10ns
10ns
10ns
15ns
15ns
15ns
15ns
15ns
15ns
2
DESCRIPTION
The P3Z22V10 is the first SPLD to combine high performance with
low power, without the need for “turbo bits” or other power down
schemes. To achieve this, Philips Semiconductors has used their
FZP design technique, which replaces conventional sense
amplifier methods for implementing product terms (a technique that
has been used in PLDs since the bipolar era) with a cascaded chain
of pure CMOS gates. This results in the combination of low power
and high speed that has previously been unattainable in the PLD
arena. For 5V operation, Philips Semiconductors offers the
P5Z22V10 that offers high speed and low power in a 5V
implementation.
The P3Z22V10 uses the familiar AND/OR logic array structure,
which allows direct implementation of sum-of-products equations.
This device has a programmable AND array which drives a fixed OR
array. The OR sum of products feeds an “Output Macro Cell”
(OMC), which can be individually configured as a dedicated input, a
combinatorial output, or a registered output with internal feedback.
Programmable output polarity
Synchronous preset/asynchronous reset capability
Security bit prevents unauthorized access
Electronic signature for identification
Design entry and verification using industry standard CAE tools
Reprogrammable using industry standard device programmers
TEMPERATURE
–40 to +85 C
–40 to +85 C
–40 to +85 C
0 to +70 C
0 to +70 C
0 to +70 C
0 to +70 C
0 to +70 C
0 to +70 C
RANGE
OPERATING RANGE
V
V
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 3.3V 10%
= 3.3V 10%
= 3.3V 10%
= 3.3V 10%
= 3.3V 10%
= 3.3V 10%
= 3.3V 10%
= 3.3V 10%
= 3.3V 10%
Product specification
P3Z22V10
853–2004 18193
DRAWING
SOT261-3
SOT137-1
SOT355-1
SOT261-3
SOT137-1
SOT355-1
SOT261-3
SOT137-1
SOT355-1
NUMBER