S1K50000 Epson Electronics America, Inc., S1K50000 Datasheet - Page 62

• Manufacturer Part Number: S1K50000
• Description: Design Guide S1k50000 Series
• Manufacturer: Epson Electronics America, Inc.

STANDARD CELL S1K50000 SERIES
DESIGN GUIDE
(2) DC test
(3) AC test
(4) Adding a test-mode control circuit
Measurement is conducted to determine whether all of the input and output pins satisfy the
specifications associated with DC characteristics. If a test circuit is not available,
customers will be requested to create a test pattern that makes it possible to measure DC
characteristics. Many man-hours may be required to create this test pattern. Use of a test
circuit makes it easy to create a test pattern and measure DC characteristics.
Measurement is made of the pin-to-pin (input pin to output pin) speed. In cases in which
the actual operating frequency cannot be inspected by an LSI tester, the operating speed
can be guaranteed by measuring the delay in a specific path.
The AC test monitor output pin is used to evaluate lot-to-lot dispersion at Seiko Epson by
measuring a dedicated AC path (cell name: KACP1). (When using a test circuit, be sure to
insert KACP1 in its design.)
An example circuit in cases in which you configure a test circuit is shown below. Refer to
the example test circuit shown in Figure 4-1.
a. Select four test input pins and two output pins.
b. Use the input cell XITST1 for the test-mode select input pins (INP0, 1, 2).
c. The input buffers for the test-mode select input pins (INP0, 1, 2) vary depending on the
d. The output buffers of the test monitor output pins (OUT3, OUT4) vary depending on the
e. For all output and bidirectional pins, be sure to use input/output buffers with a test mode.
f. Create a test-mode control circuit (KTCIR), and include it in the circuit design.
g. Make sure the input buffer (XITST1) for the test-mode switch pin has its output pins X
Test-mode switch pin
Test-mode select input pin (shared input pin)
AC test monitor output pin (shared output pin)
DC test monitor output pin (shared output pin)
input buffers of the user application. However, avoid sharing these pins with input pins
that have a critical path.
output buffers of the user application. However, avoid sharing these pins with output
pins that have a critical path.
and LG connected to the TST and ILG pins of the KTCIR.
EPSON
Chapter 4: Circuit Design Taking Testability into Account
: 1 pc.
: 3 pcs.
: 1 pc.
: 1 pc.
57