S1K50000 Epson Electronics America, Inc., S1K50000 Datasheet - Page 69
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S1K50000
Manufacturer Part Number
S1K50000
Description
Design Guide S1k50000 Series
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1K50000.pdf
(131 pages)
- Current page: 69 of 131
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Chapter 5: Propagation Delay Time and Timing Design
Chapter 5 Propagation Delay Time and Timing
5.1 Precautions Regarding the Relationship between Ta and Tj
64
The delay time in an LSI is determined by the delay time in each cell itself, and by delays
caused by capacitive loads such as wiring and input capacitances connected to the outputs of
those cells.
The delay time fluctuates depending on the power-supply voltage, ambient temperature, and
process conditions. It also fluctuates in accordance with factors associated with the circuit
configuration, such as input waveforms, input logic levels, and mirror effects. The S1K50000
series offers a highly accurate delay calculation environment in which these fluctuating factors
are taken into account. Therefore, please note that the delay calculations differ from those
performed using the values listed in the “Standard Cell S1K50000-Series MSI Cell Library”
described later.
The delay in a CMOS IC basically fluctuates with Tj (junction temperature). IC specifications,
on the other hand, are generally represented by Ta (ambient temperature). However, the
relationship between Tj and Ta is not constant; it varies depending on the package’s thermal
resistance and the power consumption of that IC. (For details, see Section 7.2, “Power-
Consumption Limitations.”)
For ASICs, the package’s thermal resistance and the power consumption vary with each
circuit and application. Therefore, strictly speaking, specification examination based on Ta is
difficult. As a result, delay libraries are available with Seiko Epson’s S1K50000 series to help
you verify the circuit design at its early stage with respect to the approximate guidelines given
below.
Of course, if the relationship between Ta and Tj varies significantly when the package’s
thermal resistance and the power consumption are estimated, customers will be
recommended to use the Tj = -40 to 125 [°C] library for Ta = 0 to 70 [°C], or requested to have
other conditions added.
* Tj = 0 to 85 [°C] library for Ta = 0 to 70 [°C]
* Tj = -40 to 125 [°C] library for Ta = -40 to 85 [°C]
Design
EPSON
STANDARD CELL S1K50000 SERIES
DESIGN GUIDE
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