XA-G39 NXP Semiconductors, XA-G39 Datasheet
XA-G39
Related parts for XA-G39
XA-G39 Summary of contents
Page 1
... XA-G39 XA 16-bit microcontroller family 32K FLASH/1K RAM, watchdog, 2 UARTs Preliminary data hilips Semiconductors INTEGRATED CIRCUITS 2002 Mar 13 ...
Page 2
... Philips Semiconductors XA 16-bit microcontroller family 32K Flash/1K RAM, watchdog, 2 UARTs GENERAL DESCRIPTION The XA-G39 is a member of Philips’ 80C51 XA (eXtended Architecture) family of high performance 16-bit single-chip microcontrollers. The XA-G39 contains 32 kbytes of Flash program memory, and provides three general purpose timers/counters, a watchdog timer, dual UARTs, and four general purpose I/O ports with programmable output configurations ...
Page 3
... LOGIC SYMBOL RxD0 TxD0 INT0 INT1 T0 T1/BUSW WRL RD 2002 Mar 13 TEMPERATURE RANGE ( C) AND PACKAGE 0 to +70 44-pin Plastic Leaded Chip Carrier XTAL1 XTAL2 RST EA/WAIT PSEN ALE 3 Preliminary data XA-G39 FREQ. DRAWING (MHz) NUMBER 30 SOT187-2 T2EX T2 TXD1 RXD1 A0/WRH SU01588 ...
Page 4
... P1.5/TxD1 29 P2.5/A17D13 8 P1.6/T2 30 P2.6/A18D14 9 P1.7/T2EX 31 P2.7/A19D15 10 RST 32 PSEN 11 P3.0/RxD0 33 ALE P3.1/TxD0 35 EA/V 14 P3.2/INT0 36 P0.7/A11D7 15 P3.3/INT1 37 P0.6/A10D6 16 P3.4/T0 38 P0.5/A9D5 17 P3.5/T1/BUSW 39 P0.4/A8D4 18 P3.6/WRL 40 P0.3/A7D3 19 P3.7/RD 41 P0.2/A6D2 20 XTAL2 42 P0.1/A5D1 21 XTAL1 43 P0.0/A4D0 2002 Mar /WAIT PP SU01035 4 Preliminary data XA-G39 ...
Page 5
... Timer 1 external input, or timer 1 overflow output. The value on this pin is latched as the external reset input is released and defines the default external data bus width (BUSW 8-bit bus and 1 = 16-bit bus. External data memory low byte write strobe. External data memory read strobe. 5 Preliminary data XA-G39 ...
Page 6
... T2EX T2 TxD1 RxD1 397 396 395 394 432 P2.7 P2.6 P2.5 P2.4 39F 39E 39D 39C 433 Preliminary data XA-G39 RESET VALUE LSB — — — — BUSD BC2 BC1 BC0 Note 1 DR1 DR0 DRA1 DRA0 FF CR1 CR0 CRA1 CRA0 ...
Page 7
... ESWEN R6SEG R5SEG R4SEG 47A — SWE7 SWE6 SWE5 7 Preliminary data XA-G39 RESET RESET VALUE VALUE LSB Note 5 Note 5 Note 5 Note 5 Note 5 Note 5 Note 5 Note 5 223 222 221 220 — — PD ...
Page 8
... The WDCON reset value is E6 for a Watchdog reset, E4 for all other reset causes. 7. The XA-G39 implements an 8-bit SFR bus, as stated in Chapter 8 of the XA User Guide . All SFR accesses must be 8-bit operations. Attempts to write 16 bits to an SFR will actually write only the lower 8 bits. Sixteen bit SFR reads will return undefined data in the upper byte. ...
Page 9
... DATA MEMORY (DIRECTLY AND INDIRECTLY ADDRESSABLE, ON CHIP) 2002 Mar MBYTE TOTAL CODE MEMORY 2 KBYTES BOOT ROM 32 KBYTES ON-CHIP CODE MEMORY Figure 1. XA-G39 Program Memory Map FFFFFh FFFFFh 0400H 03FFh DIRECTLY ADDRESSED DATA (1k PER SEGMENT) 0040h 003Fh 0020h 001Fh 0000h Figure 2 ...
Page 10
... CAPABILITIES OF THE PHILIPS XA-G39 FLASH-BASED MICROCONTROLLERS Flash organization The XA-G39 contains 32 kbytes of Flash program memory. This memory is organized as 3 separate blocks. The first two blocks are 8 kbytes in size, filling the program memory space from address 0 through 3FFF hex. The final block is 16 kbytes in size and occupies addresses 4000 through 7FFF hex ...
Page 11
... The “Boot Vector” allows forcing the execution of a user supplied Flash loader upon reset, under two specific sets of conditions. At the falling edge of reset, the XA-G39 examines the contents of the Status Byte. If the Status Byte is set to zero, power-up execution starts at location 0000H, which is the normal start address of the user’ ...
Page 12
... ISP facility. The maximum number of data bytes in a record is limited to 16 (decimal). ISP commands are summarized in Table record is received by the XA-G39, the information in the record is stored internally and a checksum calculation is performed. The 12 Preliminary data ...
Page 13
... Should an error occur in the checksum, the XA-G39 will send an “X” out the serial port indicating a checksum error. If the checksum calculation is found to match the checksum in the record, then the command will be executed. In most cases, successful reception of the record will be indicated by transmitting a “ ...
Page 14
... NOTE: Only two bits of these Special Cells may be programmed at one time. Example: :020000830601FC78 2002 Mar 13 COMMAND/DATA FUNCTION erase block 1 erase boot vector and status byte (inhibit writing to FLASH) (inhibit FLASH verify) (disable external memory) program security bit 2 program boot vector to FC00h 14 Preliminary data XA-G39 ...
Page 15
... Example: :02000085000178 2002 Mar 13 COMMAND/DATA FUNCTION display 4000–4FFF read signature byte – device Preliminary data XA-G39 (EAH) (XA–G39 = 65H)) ...
Page 16
... PGM_MTP. The programming functions are selected by setting up the microcontroller’s registers before making a call to PGM_MTP at FFF0H. Results are returned in the registers. The IAP calls are shown in Table 2. PARAMETER 01h – security bit # 2 (inhibit FLASH verify) 02h – security bit # 3 (disable external memory) 16 Preliminary data XA-G39 ...
Page 17
... BPSW[7:0] 0001h: program BPSW[15:8] 0002h: program BPC[7:0] 0003h: program BPC[15:8] 0004h: program status byte 000Ah: program security bit #1 000Ch: program security bit #2 000Eh: program security bit #3 17 Preliminary data XA-G39 ...
Page 18
... The security feature protects against software piracy and prevents the contents of the Flash from being read. The Security Lock bits are located in Flash. The XA-G39 has 3 programmable security lock bits that will provide different levels of protection for the on-chip code and data (see Table 3) ...
Page 19
... Philips Semiconductors XA 16-bit microcontroller family 32K Flash/1K RAM, watchdog, 2 UARTs XA-G39 TIMER/COUNTERS The XA has two standard 16-bit enhanced Timer/Counters: Timer 0 and Timer 1. Additionally, it has a third 16-bit Up/Down timer/counter, T2. A central timing generator in the XA core provides the time-base for all XA Timers and Counters. The timer/event counters can perform the following functions: – ...
Page 20
... When Timer Mode 3, Timer 1 can be turned on and off by switching it out of and into its own Mode 3, or can still be used by the serial port as a baud rate generator fact, in any application not requiring an interrupt. TR1 TF0 TR0 IE1 IT1 20 Preliminary data XA-G39 LSB IE0 IT0 SU00604C ...
Page 21
... TL2 and TH2, respectively. A logic ‘0’ at pin T2EX causes Timer 2 to count down. When counting down, the timer value is compared to the 16-bit value contained in T2CAPH and T2CAPL. When the value is equal, the 21 Preliminary data XA-G39 LSB C/T2 CP/RL2 SU01592 ...
Page 22
... T2EX pin X X — — — — T1OE — RCLK1 TCLK1 — — Figure 10. Timer 2 Mode Control (T2MOD) 22 Preliminary data XA-G39 TCLK MODE Timer off (stopped) 16-bit capture Baud rate generator LSB — T0OE SU00612B LSB T2OE DCEN SU00610B ...
Page 23
... Control TR2 Reload T2CAPL T2CAPH Control (DOWN COUNTING RELOAD VALUE) FFH FFH OVERFLOW TL2 TH2 T2CAPL T2CAPH (UP COUNTING RELOAD VALUE) 23 Preliminary data XA-G39 TF2 Timer 2 Interrupt EXF2 SU00704 TF2 Timer 2 Interrupt EXF2 SU00705 TOGGLE EXF2 TF2 INTERRUPT COUNT DIRECTION ...
Page 24
... When coming out of a hardware reset, the software should load the autoload register and then feed the watchdog (cause an autoload). If the watchdog is running and happens to underflow at the time the external reset is applied, the watchdog time-out flag will be cleared. 24 Preliminary data XA-G39 4096 t and the OSC PRE0 ...
Page 25
... Timeout flag WDCON.0 — UARTs The XA-G39 includes 2 UART ports that are compatible with the enhanced UART used on the 8xC51Fx, 8xC51Rx+, 8xC51Rx2, and 8xC51Mx2. Baud rate selection is somewhat different due to the clocking scheme used for the XA timers. Some other enhancements have been made to UART operation. ...
Page 26
... If there is any possibility that a higher priority interrupt might become active between the write to SnBUF and the clearing of the TI_n flag, the interrupt system may have to be temporarily disabled during that sequence by clearing, then setting the EA bit in the IEL register. 26 Preliminary data XA-G39 ...
Page 27
... T2CON 0x418 T2MOD 0x419 Prescaler Select for Timer Clock (TCLK) SCR 0x440 — — — — FEn (See also Figure 17 regarding Framing Error flag) 27 Preliminary data XA-G39 bit5 bit4 RCLK0 TCLK0 bit5 bit4 RCLK1 TCLK1 bit3 bit2 PT1 PT0 LSB BRn ...
Page 28
... Broadcast address of all “don’t cares”. This effectively disables the Automatic Addressing mode and allows the microcontroller to use standard UART drivers which do not make use of this feature. 28 Preliminary data XA-G39 1100 0000 1111 1101 = 1100 00X0 1100 0000 ...
Page 29
... FEn BRn Figure 17. UART Framing Error Detection SM0_n SM1_n SM2_n REN_n COMPARATOR 29 Preliminary data XA-G39 LSB TB8 RB8 TI RI SU00597C ONLY IN STOP MODE 2, 3 BIT if 0, sets FE SnSTAT OEn STINTn SU00598 D7 D8 SnCON TB8_n ...
Page 30
... POWER REDUCTION MODES The XA-G39 supports Idle and Power Down modes of power reduction. The idle mode leaves some peripherals running to allow them to wake up the processor when an interrupt is generated. The power down mode stops the oscillator in order to minimize power. ...
Page 31
... IEL or IEH registers). Only three bits of the IPA register values are used on the XA-G39. Each event interrupt can be set to occur at one of 8 priority levels via bits in the Interrupt Priority (IP) registers, IPA0 through IPA5 ...
Page 32
... DDmin 3.2mA DDmin 5.25 V must be externally limited as follows V Preliminary data XA-G39 RATING UNIT –55 to +125 C –65 to +150 +13.0 V –0 +0 1.5 W LIMITS UNIT UNIT MIN TYP MAX 110 mA ...
Page 33
... V1 = 0.5 if the ALEW bit = 0, and 1.5 if the ALEW bit = 1. 2002 Mar 5.25 V, – +85 C for industrial. DD PARAMETER PARAMETER ( ( ( ( ( (V12 * t (V13 * t (V11 * t ( (V11 * t (V10 * t 33 Preliminary data XA-G39 VARIABLE CLOCK UNIT UNIT MIN MAX 0 30 MHz 1 0 ...
Page 34
... This would be A3–A0 for an 8-bit bus, and A3–A1 for a 16-bit bus. Also, a 16-bit data read operation conducted on a 8-bit wide bus similarly does not include two separate RD strobes. So, a rising edge on the low order address line (A0) must be used to trigger a WAIT in the second half of such a cycle. 2002 Mar 13 34 Preliminary data XA-G39 ...
Page 35
... Please note that the XA-G39 requires that extended data bus hold time (WM0 = used with external bus write cycles. 7. Applies only to an external clock source, not when a crystal or ceramic resonator is connected to the XTAL1 and XTAL2 pins. ...
Page 36
... UNMULTIPLEXED ADDRESS Figure 23. External Data Memory Read Cycle (Non-ALE Cycle) 2002 Mar LLRL RLRH t RHDZ t RLDV t RHDX * DATA AVDVA A0 or A1–A3, A12–A19 D0–D7 A0–A3, A12–A19 36 Preliminary data XA-G39 DXUA SU00947 * DATA IN t AVDVB A0–A3, A12–A19 SU00708A ...
Page 37
... RD, OR PSEN) t WTH 2002 Mar WLWH LLWL t QVWX * DATA OUT A1–A3, A12–A19 Figure 24. External Data Memory Write Cycle (The dashed line shows the strobe without WAIT.) t WTL Figure 25. WAIT Signal Timing 37 Preliminary data XA-G39 t WHQX UAWH SU00584C SU00709A ...
Page 38
... DD Figure 27. AC Testing Input/Output +0.1V TIMING REFERENCE POINTS –0.1V /V level occurs Figure 28. Float Waveform (NC) CLOCK SIGNAL SU00591B Figure 30 Preliminary data XA-G39 SU00842 SU00703A V –0. +0. 20mA SU00011 RST EA XTAL2 ...
Page 39
... Tests in Active and Idle Modes 5ns CLCH CHCL RST EA (NC) XTAL2 XTAL1 V SS SU00585A Test Condition, Power Down Mode DD All other pins are disconnected 5 Preliminary data XA-G39 MAX. I (ACTIVE) DD MAX. I (IDLE SU00844 SU00608A ...
Page 40
... Philips Semiconductors XA 16-bit microcontroller family 32K Flash/1K RAM, watchdog, 2 UARTs PLCC44: plastic leaded chip carrier; 44 leads 2002 Mar 13 40 Preliminary data XA-G39 SOT187-2 ...
Page 41
... Philips Semiconductors XA 16-bit microcontroller family 32K Flash/1K RAM, watchdog, 2 UARTs REVISION HISTORY Date CPCN 2002 Mar 13 9397 750 08927 2002 Mar 13 Description Initial release 41 Preliminary data XA-G39 ...
Page 42
... Contact information For additional information please visit http://www.semiconductors.philips.com. For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. hilips Semiconductors 2002 Mar 13 Fax: + 24825 Document order number: 42 Preliminary data XA-G39 Koninklijke Philips Electronics N.V. 2002 All rights reserved. Printed in U.S.A. Date of release: 03-02 9397 750 08927 ...