CDK1304 Cadeka Microcircuits LLC., CDK1304 Datasheet - Page 4

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CDK1304

Manufacturer Part Number
CDK1304
Description
10-bit, 25 Msps 135mw A/d Converter
Manufacturer
Cadeka Microcircuits LLC.
Datasheet
Data Sheet
Electrical Characteristics
(T
notes:
1. 100% production tested at +25°C.
2. Parameter is guaranteed (but not tested) by design and characterization data.
©2008 CADEKA Microcircuits LLC
symbol
DC Performance
Analog Input
Reference Input
Reference Settling Time
Conversion Characteristics
Dynamic Performance
DLE
ILE
ENOB
SNR
THD
SINAD
A
= T
Min
to T
parameter
Resolution
Differential Linearity Error
Integral Linearity Error
No Missing Codes
Input Voltage Range
Input Resistance
Input Capacitance
Input Bandwidth
Gain Error
Offset Error
Resistance
Bandwidth
Voltage Range
V
V
Maximum Conversion Rate
Minimum Conversion Rate
Pipeline Delay (Latency)
Aperture Delay Time
Aperture Jitter Time
Effective Number of Bits
Signal-to-Noise Ratio w/o Harmonics
Total Harmonic Distortion
Signal-to-Noise and Distortion
Max
RHS
RLS
, AV
DD
(1)
= DV
(2)
DD
(1)
= OV
(2)
(2)
(1)
DD
= +5V, V
IN
conditions
Small Signal
Small Signal
Δ (V
Δ (V
ƒ
9 distortion bins from 1024 pt FFT
ƒ
9 distortion bins from 1024 pt FFT
= 0 to 4V, ƒ
IN
IN
V
V
V
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
IN
IN
IN
IN
IN
IN
RLS
RHS
RHS
= 3.58MHz
= 10.3MHz
RHF
RLS
= 3.58MHz
= 10.3MHz
= 3.58MHz
= 10.3MHz
= 3.58MHz
= 10.3MHz
(2)
(2)
– V
– V
– V
RLS
RLF
RHS
)
)
clk
(1)
(1)
(1)
(1)
(1)
(1)
,
,
= 25 MSPS, V
RHS
= 4V, V
RLS
Min
V
55.5
51.5
50.5
300
3.0
10
50
25
54
53
53
RLS
0
2
= 0V; unless otherwise noted)
typ
±0.5
±1.0
±2.0
±2.0
100
500
150
4.0
8.5
8.3
90
75
15
20
15
57
56
59
54
55
52
5
8
Guaranteed
www.cadeka.com
Max
AV
V
600
2.0
12
RHS
DD
CLK Cycle
CLK Cycle
CLK Cycle
units
MHz
MHz
MHz
MHz
ps
bits
LSB
LSB
LSB
LSB
Bits
Bits
mV
mV
dB
dB
dB
dB
dB
dB
pF
ns
Ω
V
V
V
V
pp
4

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