ADT7476 Analog Devices, Inc., ADT7476 Datasheet - Page 14

• Manufacturer Part Number: ADT7476
• Description: Dbcool Remote Thermal Controller And Voltage Monitor
• Manufacturer: Analog Devices, Inc.

ADT7476
4.
When all data bytes have been read or written, stop
conditions are established. In write mode, the master pulls
the data line high during the 10th clock pulse to assert a
stop condition.
In read mode, the master device overrides the acknowledge
bit by pulling the data line high during the low period before
the ninth clock pulse. This is known as No Acknowledge.
The master then takes the data line low during the low
period before the 10th clock pulse, and then high during the
10th clock pulse to assert a stop condition. Any number of
bytes of data can be transferred over the serial bus in one
operation. It is not possible to mix read and write in one
operation because the type of operation is determined at the
beginning and cannot subsequently be changed without
starting a new operation. For the ADT7476, read operations
contain one byte, and write operations contain either one or
two bytes.
To write data to one of the device data registers or read
data from it, the address pointer register must be set so that
the correct data register is addressed; then data can be
written into that register or read from it. The first byte of a
write operation always contains an address stored in the
address pointer register. If data is to be written to the
device, the write operation contains a second data byte that
is written to the register selected by the address pointer
register (see Figure 18).
The device address is sent over the bus followed by the
R/ W bit set to 0. This is followed by two data bytes. The
first data byte is the address of the internal data register to
be written to, which is stored in the address pointer
register. The second data byte is the data to be written to
the internal data register.
SDA
SCL
START BY
MASTER
Figure 18. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
0
1
1
SERIAL BUS ADDRESS BYTE
0
1
FRAME 1
SDA (CONTINUED)
1
SCL (CONTINUED)
A1
A0
Rev. B | Page 14 of 72
R/W
ADT7476
ACK. BY
D7
9
1
D7
D6
1
On PCs and servers, control of the ADT7476 is carried out
using the SMBus. The ADT7476 is connected to this bus as a
slave device, under the control of a master controller, which is
usually (but not necessarily) the ICH.
The ADT7476 has three 7-bit serial bus addresses. The R/ W bit
must be added to get the 8-bit address (that is, 01011100 or
0x5C). Data is sent over the serial bus in sequences of nine
clock pulses: eight bits of data followed by an acknowledge bit
from the slave device. Transitions on the data line must occur
during the low period of the clock signal and remain stable
during the high period because a low-to-high transition when
the clock is high might be interpreted as a stop signal. The
number of data bytes transmitted over the serial bus in a single
read or write operation is limited only by what the master and
slave devices can handle.
When reading data from a register, there are two possibilities:
•
•
D6
D5
If the ADT7476 address pointer register value is unknown,
or not the desired value, it must first be set to the correct
value before data can be read from the desired data register.
This is done by performing a write to the ADT7476 as
before, but only the data byte containing the register
address is sent because no data is written to the register
(see Figure 19). A read operation is then performed
consisting of the serial bus address, R/ W bit set to 1,
followed by the data byte read from the data register (see
Figure 20.)
If the address pointer register is already at the desired
address, data can be read from the corresponding data
register without first writing to the address pointer register
(see Figure 20).
ADDRESS POINTER REGISTER BYTE
D5
D4
DATA BYTE
FRAME 3
D4
D3
FRAME 2
D3
D2
D2
D1
D1
D0
ADT7476
ACK. BY
D0
9
ADT7476
ACK. BY
STOP BY
MASTER
9