ADT7476 Analog Devices, Inc., ADT7476 Datasheet - Page 61
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ADT7476
Manufacturer Part Number
ADT7476
Description
Dbcool Remote Thermal Controller And Voltage Monitor
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADT7476.pdf
(72 pages)
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Table 33. Register 0x55—TACH1 Minimum High Byte (Power-On Default = 0xFF)
Bits
[4:0]
[7:5]
Table 34. PWMx Configuration Registers
Register Address
0x5C
0x5D
0x5E
1
Table 35. Register 0x5C, Register 0x5D, and Register 0x5E—PWMx Configuration Registers (Power-On Default = 0x62)
Bit
[2:0]
[4]
[7:5]
These registers become read-only when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to these registers fail.
Name
Reserved
SCADC
Name
SPIN
INV
BHVR
R/W
R/W
R/W
R/W
R/W
Read-only
R/W
Description
These bits control the startup timeout for PWMx. The PWM output stays high until two valid TACH rising
edges are seen from the fan. If there is not a valid TACH signal during the fan TACH measurement directly
after the fan start-up timeout period, then the TACH measurement reads 0xFFFF and Interrupt Status Register
2 reflects the fan fault. If the TACH minimum high and low bytes contain 0xFFFF or 0x0000, then the Status
Register 2 bit is not set, even if the fan has not started.
This bit inverts the PWM output. The default is 0, which corresponds to a logic high output for 100% duty
cycle. Setting this bit to 1 inverts the PWM output, so 100% duty cycle corresponds to a logic low output.
These bits assign each fan to a particular temperature sensor for localized cooling.
R/W
R/W
R/W
R/W
000 = No start-up timeout
001 = 100 ms
010 = 250 ms (default)
011 = 400 ms
100 = 667 ms
101 = 1 sec
110 = 2 sec
111 = 4 sec
000 = Remote 1 temperature controls PWMx (automatic fan control mode).
001 = Local temperature controls PWMx (automatic fan control mode).
010 = Remote 2 temperature controls PWMx (automatic fan control mode).
011 = PWMx runs full speed (default).
100 = PWMx disabled.
101 = Fastest speed calculated by local and Remote 2 temperature controls PWMx.
110 = Fastest speed calculated by all three temperature channel controls PWMx.
111 = Manual mode. PWM duty cycle registers (Register 0x30 to Register 0x32) become writable.
Description
These bits are reserved when Bit 6 of Configuration Register 2 (0x73) is set (single-channel ADC mode).
Otherwise, these bits represent Bits [4:0] of the TACH1 minimum high byte.
When Bit 6 of Configuration Register 2 (0x73) is set (single-channel ADC mode), these bits are used to
select the only channel from which the ADC takes measurements. Otherwise, these bits represent
Bits [7:5] of the TACH1 minimum high byte.
1
Description
PWM1 configuration
PWM2 configuration
PWM3 configuration
Rev. B | Page 61 of 72
Power-On Default
0x62
0x62
0x62
ADT7476