ADC12034 National Semiconductor Corporation, ADC12034 Datasheet - Page 38

• Manufacturer Part Number: ADC12034
• Description: Self-calibrating 12-bit Plus Sign Serial I/o A/d Converters With Mux And Sample/hold
• Manufacturer: National Semiconductor Corporation

www.national.com
capacitors should be located as close to the bypassed pin as
practical, especially the smaller value capacitors.
11.0 CLOCK SIGNAL LINE ISOLATION
The ADC12030/2/4/8's performance is optimized by routing
the analog input/output and reference signal conductors as
far as possible from the conductors that carry the clock signals
to the CCLK and SCLK pins. Maintaining a separation of at
least 7 to 10 times the height of the clock trace above its ref-
erence plane is recommended.
12.0 THE CALIBRATION CYCLE
A calibration cycle needs to be started after the power sup-
plies, reference, and clock have been given enough time to
stabilize after initial turn-on. During the calibration cycle, cor-
rection values are determined for the offset voltage of the
sampled data comparator and any linearity and gain errors.
These values are stored in internal RAM and used during an
analog-to-digital conversion to bring the overall full-scale, off-
set, and linearity errors down to the specified limits. Full-scale
error typically changes ±0.4 LSB over temperature and lin-
earity error changes even less; therefore it should be neces-
sary to go through the calibration cycle only once after power
up if the Power Supply Voltage and the ambient temperature
do not change significantly (see the curves in the Typical Per-
formance Characteristics).
13.0 THE AUTO-ZERO CYCLE
To correct for any change in the zero (offset) error of the A/D,
the auto-zero cycle can be used. It may be necessary to do
an auto-zero cycle whenever the ambient temperature or the
power supply voltage change significantly. (See the curves
titled “Zero Error Change vs. Ambient Temperature” and “Ze-
ro Error Change vs. Supply Voltage” in the Typical Perfor-
mance Characteristics.)
14.0 DYNAMIC PERFORMANCE
Many applications require the A/D converter to digitize AC
signals, but the standard DC integral and differential nonlin-
earity specifications will not accurately predict the A/D
converter's performance with AC input signals. The important
specifications for AC applications reflect the converter's ability
Note: V
The assignment of the RS232 port is shown below
A
+
, V
D
+
, and V
REF
COM1
+
on the ADC12038 each have 0.01 µF and 0.1 µF chip caps, and 10 µF tantalum caps. All logic devices are bypassed with 0.1 µF caps.
Input Address
Output Address
3FC
3FE
B7
X
X
38
B6
X
X
to digitize AC signals without significant spectral errors and
without adding noise to the digitized signal. Dynamic charac-
teristics such as signal-to-noise (S/N), signal-to-noise + dis-
tortion ratio (S/(N + D)), effective bits, full power bandwidth,
aperture time and aperture jitter are quantitative measures of
the A/D converter's capability.
An A/D converter's AC performance can be measured using
Fast Fourier Transform (FFT) methods. A sinusoidal wave-
form is applied to the A/D converter's input, and the transform
is then performed on the digitized waveform. S/(N + D) and
S/N are calculated from the resulting FFT data, and a spectral
plot may also be obtained. Typical values for S/N are shown
in the table of Electrical Characteristics, and spectral plots of
S/(N + D) are included in the typical performance curves.
The A/D converter's noise and distortion levels will change
with the frequency of the input signal, with more distortion and
noise occurring at higher signal frequencies. This can be seen
in the S/(N + D) versus frequency curves.
Effective number of bits can also be useful in describing the
A/D's noise and distortion performance. An ideal A/D con-
verter will have some amount of quantization noise, deter-
mined by its resolution, and no distortion, which will yield an
optimum S/(N + D) ratio given by the following equation:
where "n" is the A/D's resolution in bits.
Since the ideal A/D converter has no distortion, the effective
bits of a real A/D converter, therefore, can be found by:
As an example, this device with a differential signed 5V, 1 kHz
sine wave input signal will typically have a S/(N + D) of 77 dB,
which is equivalent to 12.5 effective bits.
15.0 AN RS232 SERIAL INTERFACE
Shown on the following page is a schematic for an RS232
interface to any IBM and compatible PCs. The DTR, RTS, and
CTS RS232 signal lines are buffered via level translators and
connected to the ADC12038's DI, SCLK, and DO pins, re-
spectively. The D flip flop drives the CS control line.
B5
X
X
n(effective) = ENOB = (S/(N + D) - 1.76 / 6.02
CTS
B4
0
S/(N + D) = (6.02 × n + 1.76) dB
B3
X
X
B2
X
X
1135444
RTS
B1
X
DTR
B0
X