S25FL128R Meet Spansion Inc., S25FL128R Datasheet - Page 19

• Manufacturer Part Number: S25FL128R
• Description: 128 Megabit Cmos 3.0 Volt Flash Memory With 104-mhz Spi Serial Peripheral Interface Bus
• Manufacturer: Meet Spansion Inc.

9. Parallel Mode (for 16-pin SO package only)
10. Accelerated Programming Operation
December 1, 2009 S25FL128R_00_02
The parallel mode provides 8 bits of input/output to increase factory production throughput at the customer
manufacturing facilities. This function is recommended for increasing production throughput. Entering Parallel
mode requires issuing the Enter Parallel Mode command (55h). After writing the Parallel Mode Entry
command and pulling CS# high, the available commands are Read, Write Enable (WREN), Write Disable
(WRDI), Page Program (PP), Sector Erase (SE), Bulk Erase (BE), Write Status Register (WRSR), Read
Status Register (RDSR), Release from Deep Power Down/Release from Deep Power Down and Read
Electronic Signature (RES), Deep Power Down (DP), Read Identification (RDID) and Read ID (READ_ID).
The flash memory will remain in Parallel mode until either the Parallel Mode Exit command (45h) is issued, or
until a power-down / power-up sequence has been completed, after which the flash memory will exit parallel
mode automatically and switch back to serial mode (no power-down will be necessary to switch back to serial
mode if the Parallel Mode Exit command is issued).
In parallel mode, the maximum SCK clock frequency is limited to 6 MHz for Read Data Bytes and 10 MHz for
other operations. PO[6-0] can be left unconnected if the Parallel Mode functions are not needed. Fast-Read
command is not applicable in Parallel mode.
The device offers accelerated program operations through the ACC function. This function is primarily
intended to allow faster manufacturing throughput at the factory. If the system asserts V
device uses the higher voltage on the pin to reduce the time required for program operations. Removing V
from the WP#/ACC pin returns the device to normal operation. Note that the WP#/ACC pin must not be at
V
ACC pin must not be left floating or unconnected; inconsistent behavior of the device may result.
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D a t a
for operations other than accelerated programming, or device damage may result. In addition, the WP#/
S h e e t
( A d v a n c e
S25FL128R
I n f o r m a t i o n )
HH
on this pin, the
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