S25FL128R Meet Spansion Inc., S25FL128R Datasheet - Page 40

• Manufacturer Part Number: S25FL128R
• Description: 128 Megabit Cmos 3.0 Volt Flash Memory With 104-mhz Spi Serial Peripheral Interface Bus
• Manufacturer: Meet Spansion Inc.

13. Power-up and Power-down
40
During power-up and power-down, certain conditions must be observed. CS# must follow the voltage applied
on V
(see
A pull-up resistor on Chip Select (CS#) typically meets proper power-up and power-down requirements.
No Write Status Register, program, or erase command should be sent to the device until V
minimum, plus a delay of t
the WEL bit is reset (0).
Each device in the host system should have the V
package pins (this capacitor is generally of the order of 0.1 µF), as a precaution to stabilizing the V
When V
operations are disabled and the device does not respond to any commands. Note that data corruption may
result if a power-down occurs while a Write Register, program, or erase operation is in progress.
At power-up, V
At power-down, GND
CC
Figure 13.1
, and must not be driven low to select the device until V
CC
drops from the operating voltage to below the minimum V
and
CC
V
V
V
cc
cc
V
CC
(min.) plus a period of t
V
V
(max)
(min)
CC
Table
CC
CC
(cut-off)
V
D a t a
cc
(max)
(low)
(min)
PU
Vcc
13.1):
. At power-up, the device is in standby mode (not Deep Power Down mode) and
Figure 13.2 Power-down and Voltage Drop
S h e e t
Figure 13.1 Power-Up Timing Diagram
S25FL128R
PU
( A d v a n c e
t
PU
CC
No Device Access Allowed
rail decoupled by a suitable capacitor close to the
t
PD
CC
I n f o r m a t i o n )
reaches the allowable values as follows
Full Device Access
CC
t
threshold at power-down, all
PU
S25FL128R_00_02 December 1, 2009
Device Access
Allowed
Time
Time
CC
rises to the V
CC
feed.
CC