SMM605 SUMMIT Microelectronics, Inc:, SMM605 Datasheet - Page 7

• Manufacturer Part Number: SMM605
• Description: Six-channel Supply Voltage Marginer And Active Dc Output Controller
• Manufacturer: SUMMIT Microelectronics, Inc:

DC OPERATING CHARACTERISTICS
(Over recommended operating conditions, unless otherwise noted. All voltages are relative to GND.)
V
V
I
I
I
V
V
V
V
V
External
V
ADOC
UVLO
I
Note 1 – Range depends on internal regulator set to 3.6V or 5.5V see 12VIN specification.
Note 2 – All logic levels are derived with respect to the voltage present on VDD_CAP, when supplied from the VDD input VDD_CAP is equal to
Note 3 – SDA not included (separate electrical specification)
Note 4 – (100mV typ Hysteresis)
Summit Microelectronics, Inc
OL
OLSDA
S
VDD-CAP
Symbol
IH
IH
SENSE
Monitor
REF
REF
REF
REF
TC
ACC
ACC
VDD, under no load.
Input High Voltage (FS,
PWR_ON/OFF, MR#, SDA, SCL)
Input High Voltage (FS,
PWR_ON/OFF, MR#, SDA, SCL)
Output Low Current
Output low current for SDA
Leakage current on SDA and SCL
Positive Sense Voltage
Monitor Threshold Step Size
Internal 1.25V
Internal V
Coefficient
Internal V
External V
ADOC/Margin Accuracy
Under Voltage Lockout Threshold
VDD_CAP Maximum Output
Current
REF
REF
REF
Parameter
Temperature
Accuracy
Voltage Range
REF
Output Voltage
3
2
2
4
Internally regulated to 3.6V
Internally regulated to 5.5V
Internally regulated to 3.6V
Internally regulated to 5.5V
Note – Total I
should not exceed 6mA or ADOC
specification will be affected
VOL=0.4V
When SDA or SCL are at
3.6V
VM pins
VM pins
–40
–5
External V
±0.1%, Total PUPx I
6mA, V
External V
±0.1%, Total PUPx I
6mA, V
Internal V
VDD_CAP Rising
VDD_CAP Falling
VDD = 2.7V to 5.5V,
Internal Reg = 3.6V or 5.5V
2064 1.2 09/20/06
°
C to +70
°
C to +85
SENSE
SENSE
SINK
REF
REF
REF
Notes
from all PUPx pins
°
=1.25V
≤ 3.5V
> 3.5V
=1.25V,
=1.25V,
°
C
C
SINK
SINK
ACC
=
=
VDD_CAP
VDD_CAP
+0.35
-0.25
-0.15
1.24
Min
0.7 x
0.7 x
-0.4
-0.2
-0.5
-0.5
0.5
0
3
Preliminary Information
Typ.
1.25
±0.1
±0.3
±0.3
2.6
2.5
5
SMM605
VDD_CA
VDD_CAP
VDD_CAP
VDD_CAP
+0.25
+0.15
Max
1.26
+0.4
+0.2
+0.5
+0.5
0.3 x
0.3 x
1.0
1.0
P
5
Unit
mA
mA
mV
mA
µA
%
%
%
%
%
%
V
V
V
V
V
V
V
V
V
7