ST16C654D Exar Corporation, ST16C654D Datasheet - Page 7

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ST16C654D

Manufacturer Part Number
ST16C654D
Description
St16c654d -quad Uart With 64-byte Fifo And Infrared Irda Encoder/decoder
Manufacturer
Exar Corporation
Datasheet

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xr
REV. 5.0.2
Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.
Pin Description
ANCILLARY SIGNALS
(RESET#)
CHCCLK
CLKSEL
RESET
16/68#
XTAL1
XTAL2
N
RIA#
RIB#
RIC#
RID#
GND
VCC
N.C.
AME
64-LQFP
4, 35, 52
14, 28,
45, 61
P
63
19
30
50
25
26
21
27
IN
-
-
-
#
68-PLCC
6, 23, 40,
13, 47,
P
28
42
62
35
36
31
30
37
64
57
IN
8
-
-
#
100-QFP
1- 4, 26-
30, 51-
10, 61,
20, 46,
28, 29,
55, 77,
78, 79,
71, 96
P
98
33
48
84
40
41
36
35
42
43
86
80
IN
#
T
Pwr 2.97V to 5.5V power supply. The inputs are not 5V tolerant when
Pwr Power supply common, ground.
YPE
O
I
I
I
I
I
I
UART channels A-D Ring-Indicator (active low) or general purpose
input. This input should be connected to VCC when not used. This
input has no effect on the UART.
Crystal or external clock input.
Crystal or buffered clock output.
Intel or Motorola Bus Select (input with internal pull-up).
When 16/68# pin is at logic 1, 16 or Intel Mode, the device will oper-
ate in the Intel bus type of interface.
When 16/68# pin is at logic 0, 68 or Motorola mode, the device will
operate in the Motorola bus type of interface.
Motorola bus interface is not available on the 64 pin package.
Baud-Rate-Generator Input Clock Prescaler Select for channels A-
D. This input is only sampled during power up or a reset. Connect to
VCC for divide by 1 (default) and GND for divide by 4. MCR[7] can
override the state of this pin following a reset or initialization. See
MCR bit-7 and
This input provides the clock for UART channel C. An external 16X
baud clock or the crystal oscillator’s output, XTAL2, must be con-
nected to this pin for normal operation. This input may also be used
with MIDI (Musical Instrument Digital Interface) applications when
an external MIDI clock is provided. This pin is only available in the
100-pin QFP package.
When 16/68# pin is at logic 1 for Intel bus interface, this input becomes the
Reset pin (active high). In this case, a 40 ns minimum logic 1 pulse
on this pin will reset the internal registers and all outputs. The UART
transmitter output will be held at logic 1, the receiver input will be
ignored and outputs are reset during reset period
16/68# pin is at a logic 0 for Motorola bus interface, this input
becomes Reset# pin (active low). This pin functions similarly, but
instead of a logic 1 pulse, a 40 ns minimum logic 0 pulse will reset
the internal registers and outputs.
Motorola bus interface is not available on the 64 pin package.
operating at 3.3V.
No Connection. These pins are not used in either the Intel or Motor-
ola bus modes. These pins are open, but typically, should be con-
nected to GND for good design practice.
7
2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO
Figure 6
in the Baud Rate Generator section.
D
ESCRIPTION
ST16C654/654D
(Table
16). When

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