LMX2487E National Semiconductor Corporation, LMX2487E Datasheet - Page 33
LMX2487E
Manufacturer Part Number
LMX2487E
Description
7.5 Ghz High Performance Delta-sigma Low Power Dual Pllatinum? Frequency Synthesizers With 3.0 Ghz Integer Pll
Manufacturer
National Semiconductor Corporation
Datasheet
1.LMX2487E.pdf
(38 pages)
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2.6 R5 REGISTER
REGISTER
2.6.1 Fractional Numerator Determination { RF_FN[21:12], RF_FN[11:0], ACCESS[1] }
In the case that the ACCESS[1] bit is 0, then the part operates in 12-bit fractional mode, and the RF_FN2[21:12] bits become do
not care bits. When the ACCESS[1] bit is set to 1, the part operates in 22-bit mode and the fractional numerator is expanded from
12 to 22-bits.
2.6.2 Fractional Denominator Determination { RF_FD[21:12], RF_FD[11:0], ACCESS[1]}
In the case that the ACCESS[1] bit is 0, then the part is operates in the 12-bit fractional mode, and the RF_FD[21:12] bits become
do not care bits. When the ACCESS[1] is set to 1, the part operates in 22-bit mode and the fractional denominator is expanded
from 12 to 22-bits.
Denominator
Numerator
Fractional
Fractional
4194303
4194303
R5
4095
4096
4095
4096
...
...
...
...
0
1
0
1
23
0
1
0
1
.
.
22
( These bits only apply in 22- bit mode)
( These bits only apply in 22- bit mode)
In 12- bit mode, these are do not care.
In 12- bit mode, these are do not care.
0
1
0
1
.
.
these bits should be all set to 0.
these bits should be all set to 0.
21
In 22- bit mode, for N <4096,
In 22- bit mode, for N <4096,
0
1
0
1
.
.
20
0
1
0
1
.
.
RF_FD[21:12]
RF_FN[21:12]
RF_FD[21:12]
19
0
1
0
1
.
.
18
0
1
0
1
.
.
17
0
1
0
1
.
.
16
0
1
0
1
.
.
DATA[19:0]
15
0
1
0
1
.
.
14
33
1
1
1
1
.
.
13
0
0
1
0
1
0
0
1
0
1
.
.
.
.
12
0
0
1
0
1
0
0
1
0
1
.
.
.
.
11
0
0
1
0
1
0
0
1
0
1
.
.
.
.
RF_FN[21:12]
10
0
0
1
0
1
0
0
1
0
1
.
.
.
.
9 8 7 6 5 4
0
0
1
0
1
0
0
1
0
1
.
.
.
.
RF_FN[11:0]
RF_FD[11:0]
0
0
1
0
1
0
0
1
0
1
.
.
.
.
0
0
1
0
1
0
0
1
0
1
.
.
.
.
0
0
1
0
1
0
0
1
0
1
.
.
.
.
C3
0
0
1
0
1
0
0
1
0
1
.
.
.
.
3
1
0
0
1
0
1
0
0
1
0
1
.
.
.
.
C2
2
0
www.national.com
0
0
1
0
1
0
0
1
0
1
.
.
.
.
C1
1
1
0
1
1
0
1
0
1
1
0
1
.
.
.
.
C0
0
1