LMX2470 National Semiconductor Corporation, LMX2470 Datasheet - Page 29
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LMX2470
Manufacturer Part Number
LMX2470
Description
2.6 Ghz Delta-sigma Fractional-n Pll With 800 Mhz Integer-n Pll
Manufacturer
National Semiconductor Corporation
Datasheet
1.LMX2470.pdf
(36 pages)
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REGISTER
Programming Description
2.4 R3 REGISTER
2.4.1 IF_R[14:0] -- IF R Divider Value
For the IF R divider, the R value is determined by the IF_R[14:0] bits in the R3 register. The minimum value for IF_R is 3.
2.4.2 RF_CPG -- RF PLL Charge Pump Gain
This is used to control the magnitude of the RF PLL charge pump in steady state operation
R3
R Value
32767
...
3
23
0
22
0
1
.
RF_CPG[3:0]
RF_CPG[3:0]
21
0
1
.
10
12
13
14
15
11
0
1
2
3
4
5
6
7
8
9
20
DATA[19:0] ( Except for the RF_N Register, which is [22:0] )
0
1
.
19
18
0
1
.
17
(Continued)
0
1
.
16
15
0
1
.
14
0
1
29
.
13
IF_R[14:0]
IF_R[14:0]
12
0
1
.
RF Charge Pump Current (µA)
11
0
1
.
10
0
1
9
.
1000
1200
1300
1400
1500
1600
1100
100
200
300
400
500
600
700
800
900
8
0
1
.
7
6
0
1
.
5
4
0
1
.
C3
3
0
C2
1
1
2
1
.
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C1
1
0
1
1
.
C0
0
1