LMX2470 National Semiconductor Corporation, LMX2470 Datasheet - Page 5
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LMX2470
Manufacturer Part Number
LMX2470
Description
2.6 Ghz Delta-sigma Fractional-n Pll With 800 Mhz Integer-n Pll
Manufacturer
National Semiconductor Corporation
Datasheet
1.LMX2470.pdf
(36 pages)
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DIGITAL INTERFACE (DATA, CLK, LE, EN, ENRF, Ftest/LD, FLoutRF, FLoutIF)
V
MICROWIRE INTERFACE TIMING
T
T
T
T
T
T
PHASE NOISE
L
L
Electrical Characteristics
CS
CH
CWH
CWL
ES
EW
F1Hz
F1Hz
Note 3: Normalized Phase Noise Contribution is defined as: L
measured at an offset frequency, f, in a 1 Hz Bandwidth. The offset frequency, f, must be chosen sufficiently smaller than the PLL loop bandwidth, yet large enough
to avoid substantial phase noise contribution from the reference source. The offset chosen was 4 KHz.
MICROWIRE INPUT TIMING DIAGRAM
OL
Symbol
RF
IF
Low-Level Output Voltage
Data to Clock Set Up Time
Data to Clock Hold Time
Clock Pulse Width High
Clock Pulse Width Low
Clock to Load Enable Set
Up Time
Load Enable Pulse Width
RF Synthesizer Normalized
Phase Noise Contribution
(Note 3)
IF Synthesizer Normalized
Phase Noise Contribution
(Note 3)
Parameter
(V
CC
= 2.5V; -40˚C ≤ T
I
See Microwire Input Timing
See Microwire Input Timing
See Microwire Input Timing
See Microwire Input Timing
See Microwire Input Timing
See Microwire Input Timing
RF_CPG = 0
RF_CPG = 3
RF_CPG = 7
RF_CPG = 15
Applies to both low and high
current modes
OL
N
(f) = L(f) – 20log(N) – 10log(f
= 500 µA
Conditions
5
A
≤ +85˚C unless otherwise specified) (Continued)
COMP
) where L(f) is defined as the single side band phase noise
Min
50
10
50
50
50
50
Value
-200
-206
-208
-210
-209
Typ
20059372
Max
0.4
www.national.com
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Units
ns
ns
ns
ns
ns
ns
V