LMX2335L National Semiconductor Corporation, LMX2335L Datasheet - Page 16

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LMX2335L

Manufacturer Part Number
LMX2335L
Description
Pllatinum? Low Power Dual Frequency Synthesizer For Rf Personal Communications
Manufacturer
National Semiconductor Corporation
Datasheet

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Functional Description
SERIAL DATA INPUT TIMING
Parenthesis data indicates programmable reference divider data.
Data shifted into register on clock rising edge.
Data is shifted in MSB first.
t
t
t
t
t
t
Test Conditions: The Serial Data Input Timing is tested using a symmetrical waveform around V
amplitudes of 2.2V
PHASE COMPARATOR AND INTERNAL CHARGE PUMP CHARACTERISTICS
Notes: Phase difference detection range: −2π to +2π
CS
CH
CWH
CWL
ES
EW
= Clock to Load Enable Set Up Time
= Data to Clock Set Up Time
= Data to Clock Hold Time
= Load Enable Pulse Width
= Clock Pulse Width Low
= Clock Pulse Width High
The minimum width pump up and pump down current pulses occur at the D
@
V
CC
= 2.7V and 2.6V
@
V
CC
= 5.5V.
(Continued)
16
o
pin when the loop is locked.
CC
/2. The test waveform has an edge rate of 0.6V/ns with
01280710
01280709

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