HT46R64 Holtek Semiconductor Inc., HT46R64 Datasheet - Page 20

• Manufacturer Part Number: HT46R64
• Description: Ht46r64/ht46c64 -- A/d With Lcd Type 8-bit Mcu
• Manufacturer: Holtek Semiconductor Inc.

The PA0 and PA1 are pin-shared with BZ and BZ signal,
respectively. If the BZ/BZ option is selected, the output
signal in output mode of PA0/PA1 will be the buzzer sig-
nal generated by multi-function timer. The input mode
always remain in its original function. Once the BZ/BZ
option is selected, the buzzer output signal are con-
trolled by the PA0, PA1 data register only.
The I/O function of PA0/PA1 are shown below.
Note:
The PB can also be used as A/D converter inputs. The
A/D function will be described later. There is a PWM
function shared with PD0/PD1/PD2/PD3. If the PWM
function is enabled, the PWM0/PWM1/PWM2/PWM3
sig na l wi l l appe ar o n P D 0/ PD 1/ PD 2 / PD 3 ( if
PD0/PD1/PD2/PD3 is operating in output mode). Writ-
ing 1 to PD0~PD3 data register will enable the PWM
Rev. 1.80
PA0 I/O
PA1 I/O
PA0 Mode
PA1 Mode
PA0 Data
PA1 Data
PA0 Pad Status
PA1 Pad Status
I input; O output
D, D0, D1 Data
B buzzer option, BZ or BZ
X don t care
C CMOS output
X X C B B C B B B B
X C X X X C C C B B
X X D 0
X D X X X D1 D D X X
I
I
I
I
O
D
I
I
O O O O O O O O
D 0 B D
I
I
I
I
1 D
I
I D
O O O O O
0
0
1
D D 0 B
0
0 B 0 B
1
Input/Output Ports
0
1
20
output function and writing 0 will force the PD0~PD3 to
remain at 0 . The I/O functions of PD0/PD1/PD2/PD3
are as shown.
It is recommended that unused or not bonded out I/O
lines should be set as output pins by software instruction
to avoid consuming power under input floating state.
The definitions of PFD control signal and PFD output
frequency are listed in the following table.
Note:
Timer
Mode
PD0~
PD3
OFF
OFF
ON
ON
I/O
counter
Preload
X stands for unused
U stands for unknown
M is 256 for PFD0 or 65536 for PFD1
N is preload value for timer/event counter
f
Timer
Value
TMR
(Normal)
Logical
X
X
N
N
Input
I/P
is input clock frequency for timer/event
PA3 Data
Register
(Normal)
0
1
0
1
Logical
Output
O/P
HT46R64/HT46C64
PA3 Pad
State
PFD
U
0
0
(PWM)
Logical
Input
I/P
February 14, 2006
f
TMR
Frequency
/[2 (M-N)]
PFD
PWM0~
PWM3
(PWM)
X
X
X
O/P