HN29V1G91T-30 Renesas Electronics Corporation., HN29V1G91T-30 Datasheet - Page 12
HN29V1G91T-30
Manufacturer Part Number
HN29V1G91T-30
Description
128m X 8-bit Ag-and Flash Memory
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.HN29V1G91T-30.pdf
(92 pages)
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HN29V1G91T-30
Random Data output in a Page Read
When the device output the data serially in Page read mode operation, the data from any column address in
a Page which is reading can be output by writing 05h and E0h with two column address cycles.
There is no restriction on an order of column address which can be specified and it is possible to specify
many times including same column address in the same Page address.
R/*
Rev.4.00, Jun.20.2004, page 12 of 89
CLE
+-
9-
ALE
4-
I/O
Memory array
Data register
00h
Column
address L
CA1 CA2 RA1 RA2
L
Page
address N
M
30h
Page N
pageN
L
L+1
L+2
05h
CA1 CA2 E0h
Column
address M
pageN
M
M+1 M+2
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