MP7528 Exar Corporation, MP7528 Datasheet - Page 8

no-image

MP7528

Manufacturer Part Number
MP7528
Description
Cmos Dual Buffered Multiplying 8-bit Digital-to-analog Converter
Manufacturer
Exar Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MP7528JN
Manufacturer:
MP
Quantity:
20 000
Part Number:
MP7528JP
Manufacturer:
MP
Quantity:
20 000
Part Number:
MP7528JS
Manufacturer:
PULSE
Quantity:
6 150
Part Number:
MP7528JS
Manufacturer:
MPS
Quantity:
20 000
Part Number:
MP7528KN
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Part Number:
MP7528KS
Manufacturer:
MP
Quantity:
20 000
INTERFACE LOGIC INFORMATION
put port. The control input DACA/DACB selects which DAC can
accept data from the input port.
mode of the selected DAC. See Mode Selection Table below:
MP7528
DAC Selection: Both DAC latches share a common 8-bit in-
Mode Selection: Inputs CS and WR control the operating
Rev. 2.00
DAC A/DAC B
(DB0-DB7)
DATA IN
WR
CS
DAC A/DAC B
L = LOW state, H = HIGH state, X = Don’t care state
NOTES:
1. All input signal rise and fall times measured from 10% to 90% of V
2. Timing measurement reference level is V
V
V
IH
IL
V
V
L
H
X
X
Figure 1. Write Cycle Timing Diagram
DD
DD
= +5 V, t
= +15 V, t
Table 1. Mode Selection Table
r
= t
r
CS
= t
L
L
H
X
f
= 20 ns
f
= 40 ns
WR
8
L
L
X
H
t
CS
t
AS
DAC is in the write mode. The input data latches of the selected
DAC are transparent and its analog output responds to activity
on DB0-DB7.
was present on DB0-DB7 just prior to CS and WR assuming a
high state. Both analog outputs remain at the values corre-
sponding to the data in their respective latches.
Write Mode: When CS and WR are both low the selected
Hold Mode: The selected DAC latch retains the data which
V
V
t
WR
IH
IL
DAC A
Write
Hold
Hold
Hold
t
DS
DATA IN
STABLE
IH
+ V
IL
/ 2
DAC B
t
t
Hold
Write
Hold
Hold
CH
AH
t
DH
DD
.
V
V
V
V
DD
DD
DD
DD
0
0
0
0

Related parts for MP7528