HMP8116 Intersil Corporation, HMP8116 Datasheet - Page 6

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HMP8116

Manufacturer Part Number
HMP8116
Description
Ntsc/pal Video Decoder
Manufacturer
Intersil Corporation
Datasheet
VERTICAL SYNC AND FIELD DETECTION
The vertical sync and field detect circuit uses a low time
counter to detect the vertical sync sequence in the video
data stream. The low time counter accumulates the low time
encountered during any sync pulse, including serration and
equalization pulses. When the low time count exceeds the
vertical sync detect threshold, VSYNC is asserted immedi-
ately. FIELD is asserted at the same time that VSYNC is
asserted. FIELD is asserted low for odd fields and high for
even fields. Field is determined from the location in the video
line where VSYNC is detected. If VSYNC is detected in the
first half of the line, the field is odd. If VSYNC is detected in
the second half of a line, the field is even.
In the case of lost vertical sync or excessive noise that would
prevent the detection of vertical sync, the FIELD output will con-
tinue to toggle. Lost vertical sync is declared if after 337 lines, a
vertical sync period was not detected for 1 or 3 (selectable) suc-
cessive fields as specified by bit 2 of the GENLOCK CONTROL
register 04
acquisition state.
Y/C SEPARATION
A composite video signal has the luma (Y) and chroma (C)
information mixed in the same video signal. The Y/C separa-
tion process is responsible for separating the composite
video signal into these two components. The HMP8116 uti-
lizes a comb filter to minimize the artifacts that are associ-
ated with the Y/C separation process.
INPUT SAMPLE RATE CONVERTER
The input sample rate converter is used to convert video
data sampled at the CLK2 rate to a virtual 4xf
for comb filtering and color demodulation. An interpolating
filter is used to generate the 4xf
Figure 3.
COMB FILTER
A 2-line comb filter, using a single line delay, is used to per-
form part of the Y/C separation process. During S-video
operation, the Y signal bypasses the comb filter; the C signal
is processed by the comb filter since it is an integral part of
the chroma demodulator. During PAL operation, the chroma
trap filter should also be enabled for improved performance.
Since a single line store is used, the chroma will normally
H
FIGURE 3. SAMPLE RATE CONVERSION
. When this occurs, the PLLs are initialized to the
INCOMING VIDEO SAMPLES
4xf
RESAMPLED VIDEO
SC
SC
samples as illustrated in
SC
TIME
TIME
sample rate
HMP8116
6
have a half-line vertical offset from the luma data. This may
be eliminated, vertically aligning the chroma and luma sam-
ples, at the expense of vertical resolution of the luma. Bit 0 of
the OUTPUT FORMAT register 02
CHROMA DEMODULATION
The output of the comb filter is further processed using a
patented frequency domain transform to complete the Y/C
separation and demodulate the chromanance.
Demodulation is done at a virtual 4xf
the interpolated data samples to generate U and V data. The
demodulation process decimates by 2 the U/V sample rate.
OUTPUT SAMPLE RATE CONVERTER
The output sample rate converter converts the Y, U and V
data from a virtual 4xf
sample rate (i.e., 13.5MHz). It also vertically aligns the sam-
ples based on the horizontal sync information embedded in
the digital video data stream. The output sample rate is
determined by the selected video standard and whether
square or rectangular pixels are output. The output format is
4:2:2 for all modes except the RGB modes which use a 4:4:4
output format.
CLK2 INPUT
Note that the color subcarrier is derived from CLK2. Any jitter
on CLK2 will be transferred to the color subcarrier, resulting
in color changes. Thus, CLK2 should be derived from a sta-
ble clock source, such as a crystal. The use of a PLL to gen-
erate CLK2 is not recommended. CLK2 must have a 50ppm
accuracy and at least a 60/40% duty cycle to ensure proper
operation.
The CLK2 clock rate must be one of the following frequen-
cies:
The frequency of CLK2 must be 2x the desired output sam-
ple rate. The values in table 1 below indicate the CLK2 clock
rate based on the video standard and pixel mode. The out-
put sample rate for the given video standard and pixel mode
is half the CLK2 clock rate.z
TABLE 1. VIDEO STANDARD CLOCKRATE SELECTION
(B, D, G, H, I, N) PAL
VIDEO FORMAT
24.54MHz
27.00MHz
29.50MHz
(M) NTSC
(N
(M) PAL
SUMMARY
C
) PAL
SC
sample rate to the desired output
RECTANGULAR
PIXEL MODE
FREQUENCIES (MHz)
27.00
27.00
27.00
27.00
ALLOWABLE CLK2
H
controls this option.
SC
sample rate using
PIXEL MODE
SQUARE
24.54
29.50
24.54
29.50

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