HMP451S6MMP8C Hynix Semiconductor, HMP451S6MMP8C Datasheet - Page 7

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HMP451S6MMP8C

Manufacturer Part Number
HMP451S6MMP8C
Description
200pin Unbuffered Ddr2 Sdram So-dimms Based On 2gb Version
Manufacturer
Hynix Semiconductor
Datasheet
Rev. 0.1 / May. 2008
INPUT DC LOGIC LEVEL
INPUT AC LOGIC LEVEL
AC INPUT TEST CONDITIONS
Notes:
1.
2.
3.
dc Input logic HIGH
dc Input logic LOW
AC Input logic HIGH
AC Input logic LOW
V
V
SLEW
REF
SWING(MAX)
Symbol
Input waveform timing is referenced to the input signal crossing through the V
under test.
The input signal minimum slew rate is to be maintained over the range from V
and the range from V
AC timings are referenced with input waveforms switching from VIL(ac) to VIH(ac) on the positive transitions
and VIH(ac) to VIL(ac) on the negative transitions.
Parameter
V
Falling Slew =
Parameter
SWING(MAX)
Input reference voltage
Input signal maximum peak to peak swing
Input signal minimum slew rate
delta TF
V
V
Symbol
REF
V
IH
IL
REF
(AC)
(AC)
to V
delta TF
- V
< Figure : AC Input Test Signal Waveform>
IL(ac) max
V
V
IL(ac)
Symbol
Condition
IH
IL
(DC)
(DC)
V
REF
max
for falling edges as shown in the below figure.
Min
+ 0.200
-
1200pin Unbuffered DDR2 SDRAM SO-DIMMs
DDR2 667
V
REF
-0.30
Min
V
+ 0.125
REF
Max
delta TR
- 0.200
-
Rising Slew =
0.5 * V
Value
1.0
1.0
V
REF
V
DDQ
V
REF
DDQ
Min
+ 0.200
Max
-
- 0.125
REF
REF
+ 0.3
V
DDR2 800
IH(ac)
to V
level applied to the device
delta TR
Units
V/ns
IH(ac) min
min - V
V
V
V
V
V
V
V
V
V
V
REF
DDQ
IH(ac)
IH(dc)
REF
IL(dc)
IL(ac)
SS
Max
REF
- 0.200
Unit
-
for rising edges
V
V
max
max
min
min
Notes
2, 3
1
1
Note
Unit
V
V
7

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