ATFS10 ATMEL Corporation, ATFS10 Datasheet - Page 2

• Manufacturer Part Number: ATFS10
• Description: Atfs10
• Manufacturer: ATMEL Corporation

Block Diagram
Device Description
2
ATFS05/10/40
POWER ON
RESET
SER_EN
CLK
The control signals for the FPSLIC Support Device (CE, RESET/OE and CCLK) inter-
face directly with the FPSLIC control signals. All FPSLIC devices can control the entire
configuration process and retrieve data from the FPSLIC Support Device without requir-
ing an external intelligent controller.
The RESET/OE and CE pins control the tri-state buffer on the DATA output pin and
enable the address counter. When RESET/OE is driven Low, the configuration
EEPROM resets its address counter and tri-states its DATA pin. The CE pin also con-
trols the output of the FPSLIC Support Device. If CE is held High after the RESET/OE
reset pulse, the counter is disabled and the DATA output pin is tri-stated. When OE is
subsequently driven High, the counter and the DATA output pin are enabled. When
RESET/OE is driven Low again, the address counter is reset and the DATA output pin is
tri-stated, regardless of the state of CE.
When the FPSLIC Support Device has driven out all of its data and CEO is driven Low,
the device tri-states the DATA pin to avoid contention with other FPSLIC Support
Devices. Upon power-up, the address counter is automatically reset.
PROGRAMMING
COUNTER
COUNTER
ADDRESS
MODE LOGIC
ROW
RESET/OE
BIT
CE
DECODER
ROW
TC
CEO(A2)
PROGRAMMING
DECODER
DATA SHIFT
COLUMN
REGISTER
EEPROM
MATRIX
CELL
DATA
3017C–FPSLI–07/02