ATFS10 ATMEL Corporation, ATFS10 Datasheet - Page 3

• Manufacturer Part Number: ATFS10
• Description: Atfs10
• Manufacturer: ATMEL Corporation

Pin Description
3017C–FPSLI–07/02
8 LAP
Pin
1
2
3
4
5
6
7
8
RESET/
SER_EN
Name
DATA
GND
CLK
V
CE
A2
CC
OE
I/O
I/O
I
I
I
I
I
Description
Tri-state DATA output for configuration. Open-collector bi-directional pin for programming.
Clock input. Used to increment the internal address and bit counter for reading and programming.
Output Enable (active High) and RESET (active Low) when SER_EN is High. A Low level on
RESET/OE resets both the address and bit counters. A High level (with CE Low) enables the
data output driver.
Chip Enable input (active Low). A Low level (with OE High) allows DCLK to increment the
address counter and enables the data output driver. A High level on CE disables both the
address and bit counters and forces the device into a low-power standby mode. Note that this
pin will not enable/disable the device in the 2-wire Serial Programming mode ( SER_EN Low).
Ground pin. A 0.2 µF decoupling capacitor between
Device selection input, A2. This is used to enable (or select) the device during programming
(i.e., when SER_EN is Low). A2 has an internal pull-down resistor.
Serial enable must be held High during FPSLIC loading operations. Bringing SER_EN Low
enables the 2-wire Serial Programming Mode. For non-ISP applications, SER_EN should be
tied to V
+3.3V power supply pin
CC
.
V
CC
and GND is recommended.
ATFS05/10/40
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