OM6211 NXP Semiconductors, OM6211 Datasheet - Page 13

• Manufacturer Part Number: OM6211
• Description: 48 X 84 Dot Matrix Lcd Driver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
10 INITIALIZATION
10.1
After reset (RES) it is recommended to initialize the V
generator using the following sequence; a starting state of
HVE = 0, DON = 0 and DAL = 1 is assumed:
1. Set the required V
2. Set DAL = 0 to leave the Power-down state (in order to
3. Wait for at least 1 ms and set HVE = 1 to switch-on the
4. Set DON = 1 to switch the display on.
10.2
The OM6211 incorporates frame frequency calibration via
software. The calibration is achieved by tuning the internal
oscillator. After reset the frame frequency calibration is
disabled (OC = 0). The calibration can only be performed
if the driver is not in Power-down mode. The calibration is
started by setting OC = 1 via the serial interface (start
command) and will be stopped by setting OC = 0 (stop
command). The time between start and stop of the
calibration must be 200 ms to give a frame frequency of
80 Hz. Any variation in calibration time (deviation from
200 ms) results in a corresponding variation in frame
frequency. During calibration all other commands are
allowed.
The calibration may be repeated and is always performed
with the previously calibrated frequency. Through
repeated calibrations a better accuracy can be expected
and, most especially, the temperature drift can be
compensated for. A minimum time delay of 500 ms
between consecutive calibration events is necessary
(between stop and start).
The calibration will always be performed if the calibration
time is between 190 and 210 ms. If, however, the
calibration time is lower then 58 ms or higher than 690 ms
(or the stop command does not occur at all), the calibration
attempt is ignored and the previously selected frequency is
maintained. For the remaining values of the calibration
time (from 58 to 190 ms and from 210 to 690 ms) it cannot
be determined if the calibration will be performed or
ignored.
2002 Jan 17
48
multiplier S
precharge the charge pump V
V
LCD
Initialization sequence
Frame frequency calibration (OC)
generator
84 dot matrix LCD driver
1
and S
OP
0
and, if required, the voltage
LCD
is set to V
DD2
)
LCD
13
11 ADDRESSING
11.1
Data is downloaded in bytes into the RAM matrix of
OM6211 as illustrated in Figs 6 and 7. The display RAM
has a matrix of 48
by the address pointer. The address ranges are
X = 0 to 83 (1010011) and Y = 0 to 5 (101). Addresses
outside of these ranges are not allowed. The X address
increments after each byte (see Fig.7). After the last
X address (X = 83) X wraps around to 0 and Y increments
to address the next row. After the very last address (X = 83
and Y = 5) the address pointers wrap around to address
X = 0 and Y = 0.
The selection of the MX input allows horizontal mirroring:
when MX = 1, the X address space is mirrored (see Fig.6).
When MX = 0 the mirroring is disabled. MX affects data
only during writing to the RAM, so after a change of MX
RAM data must be re-written.
The MY bit allows vertical mirroring: when MY = 1, then
the Y address space is mirrored. MY does not affect the
RAM content, but defines the way RAM data is written to
the display. A change of MY has an immediate effect on
the display.
Vertical scrolling of the display is controlled by the
Z address with a range from 0 to 47 (101111). The
Z address specifies which rows of the RAM are output to
which row outputs. The value of the Z address defines
which row of the RAM will be ROW 0 of the display (which
is normally the top row of the display). For example, if the
Z address is set to 31 (see Fig.8), then the data displayed
on ROW 0 of the display will be the data from ROW 31 of
the RAM and the data on ROW 1 will be from ROW 32 of
the RAM. When the MY is active (MY = 1), then the
Z address defines which row of the RAM is written to
ROW 47 of the display. For example, when the Z address
is set to 31, ROW 47 of the display would come from
ROW 31 of the RAM and ROW 46 from ROW 32 of the
RAM (see Fig.9).
The Z address does not affect the RAM content, but
defines the way RAM data is written to the display.
A change of Z address has an immediate effect on the
display.
Addressing
84 bits. The columns are addressed
Product specification
OM6211