MBM29DL800TA-70 Meet Spansion Inc., MBM29DL800TA-70 Datasheet - Page 12

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MBM29DL800TA-70

Manufacturer Part Number
MBM29DL800TA-70
Description
Flash Memory Cmos 8m 1m ? 8 / 512k ? 16 Bit
Manufacturer
Meet Spansion Inc.
Datasheet
12
MB M29DL800TA
*1 : This command is valid during Fast Mode.
*2 : This command is valid while RESET=V
*3 : This data “00h” is also acceptable.
Notes : •Address bits A
Read/Reset
Read/Reset
Autoselect
Program
Chip Erase
Sector Erase
Erase Suspend
Erase Resume
Set to
Fast Mode
Fast
Program *
Reset from
Fast Mode *
Extended
Sector
Protect*
Command
Sequence
2
• Bus operations are defined in “MBM29DL800TA/BA User Bus Operations Tables (BYTE = V
= V
• RA =Address of the memory location to be read
• RD =Data read from location RA during read operation.
• SPA =Sector address to be protected. Set sector address (SA) and (A
• The system should generate the following address patterns:
• Both Read/Reset commands are functionally equivalent, resetting the device to the read mode.
• The command combinations not described in “MBM29DL800TA/BA Command Definitions Table” are illegal.
Address (SA), and Bank Address (BA).
PA =Address of the memory location to be programmed
SA =Address of the sector to be erased. The combination of A
BA =Bank Address (A
PD =Data to be programmed at location PA. Data is latched on the rising edge of write pulse.
SD =Sector protection verify data. Output 01h at protected sector addresses and output 00h at
1
1
Addresses are latched on the falling edge of the write pulse.
uniquely select any sector.
unprotected sector addresses.
Word Mode: 555h or 2AAh to addresses A
Byte Mode: AAAh or 555h to addresses A
IL
)”.
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Cycles
Req’d
Write
Bus
1
3
3
4
6
6
1
1
3
2
2
4
12
to A
Write Cycle
Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data
XXXh
AAAh
AAAh
AAAh
AAAh
AAAh
AAAh
XXXh
XXXh
XXXh
555h
555h
555h
555h
555h
555h
First Bus
BA
BA
BA
BA
18
16
MBM29DL800TA/BA Command Definitions Table
= X = “H” or “L” for all address commands except or Program Address (PA), Sector
to A
-70/90
AAh
AAh
AAh
AAh
AAh
AAh
F0h
B0h
A0h
30h
90h
60h
18
)
Retired Product DS05-20860-7E_August 6, 2007
Second Bus
Write Cycle
XXXh
XXXh
2AAh
2AAh
2AAh
2AAh
2AAh
2AAh
555h
555h
555h
555h
555h
555h
SPA
/MBM29DL800BA
ID
PA
.
F0h
55h
55h
55h
55h
55h
55h
60h
PD
*
3
–1
0
to A
and A
Write Cycle
AAAh
AAAh
AAAh
AAAh
AAAh
AAAh
555h
555h
555h
555h
555h
555h
(BA)
(BA)
SPA
Third Bus
11
0
to A
F0h
A0h
90h
80h
80h
20h
40h
11
18
AAAh
AAAh
Fourth Bus
Read/Write
555h
555h
SPA
RA
, A
PA
Cycle
17
, A
6
AAh
AAh
, A
16
RD
PD
SD
-70/90
, A
1
, A
15
, A
Write Cycle
0
2AAh
2AAh
555h
555h
) = (0, 1, 0).
Fifth Bus
14
, A
13
55h
55h
, and A
Write Cycle
AAAh
555h
IH
Sixth Bus
12
SA
and BYTE
will
10h
30h

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